Switch 2: Hardware

2025-08-19T20:11:14Z

Limo: /* Nintendo Switch 2 */

= Motherboard =
== Nintendo Switch 2 ==
{| class="wikitable" border="1"
|-
! Product Code || Description
|-
| BEE-CPU-01 || Retail Nintendo Switch 2
|}

=== DRAM Layout ===
The footprint is BGA-441 (JEDEC [https://www.jedec.org/standards-documents/docs/mo-342a MO-342]), with ballout defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.

[[File:Dram traces annotated.jpg|frameless|619x619px]]

= Specifications =
== Nintendo Switch 2 ==
{| class="wikitable" border="1"
|-
! Component || Description
|-
| SoC || NVIDIA GMLX30-A1 ([[Switch_2:_Tegra_T239|T239]])
|-
| Screen || Innolux ZD079KA-03A
|-
| Storage || Toshiba/Kioxia THGJFGT1E45BAILHW0 256 GB UFS 3.1 or SKhynix HN8T15DEHKX075 256 GB UFS 3.1
|-
| Memory || SKhynix H58GE6AK8BX107 6 GB LPDDR5X DRAM x2 (12GB total) or Samsung K3KL2L20DM-JGCT 6 GB LPDDR5X DRAM x2 (12GB total) or [https://www.micron.com/products/memory/dram-components/lpddr5/part-catalog/part-detail/mt62f768m64d4ek-026-wt-b Micron MT62F768M64D4EK-026] 6 GB LPDDR5X SDRAM x2 (12GB total)
|-
| Wifi/BT || MediaTek MT3681AEN (same footprint and similar pinout to [https://www.digikey.com/en/products/detail/mediatek/MT7921LEN-B/24633572 MT7921LEN])
|-
| PMIC || Maxim Integrated MAX77851SAWJ+T
|-
| Sub-PMIC || Renesas/Dialog DA9092-AIOV2
|-
| Audio || Realtek ALC5658
|-
| Voice || Intelligo Technology IG2200
|-
| USB 2.0 Hub || [https://www.lcsc.com/product-detail/C7501404.html Genesys Logic GL852G-OHY60] (Connects to joycons, WiFi/BT IC, with upstream port to SoC)
|-
| USB-C || [https://www.infineon.com/part/CYPD6228-96BZXI Cypress CYPD6228-96BZXI] (CP10359AT)
|-
| GC ASIC || B2349 GCBRG HAC STD T2010423
|}

Switch 2: Hardware

2025-08-19T20:01:59Z

Limo: /* Nintendo Switch 2 */

= Motherboard =
== Nintendo Switch 2 ==
{| class="wikitable" border="1"
|-
! Product Code || Description
|-
| BEE-CPU-01 || Retail Nintendo Switch 2
|}

=== DRAM Layout ===
The footprint is BGA-441 (JEDEC [https://www.jedec.org/standards-documents/docs/mo-342a MO-342]), with ballout defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.

[[File:Dram traces annotated.jpg|frameless|619x619px]]

= Specifications =
== Nintendo Switch 2 ==
{| class="wikitable" border="1"
|-
! Component || Description
|-
| SoC || NVIDIA GMLX30-A1 ([[Switch_2:_Tegra_T239|T239]])
|-
| Screen || Innolux ZD079KA-03A
|-
| Storage || Toshiba/Kioxia THGJFGT1E45BAILHW0 256 GB UFS 3.1 or SKhynix HN8T15DEHKX075 256 GB UFS 3.1
|-
| Memory || SKhynix H58GE6AK8BX107 6 GB LPDDR5X DRAM x2 (12GB total) or Samsung K3KL2L20DM-JGCT 6 GB LPDDR5X DRAM x2 (12GB total) or Micron MT62F768M64D4EK-026 6 GB LPDDR5X SDRAM x2 (12GB total)
|-
| Wifi/BT || MediaTek MT3681AEN (same footprint and similar pinout to [https://www.digikey.com/en/products/detail/mediatek/MT7921LEN-B/24633572 MT7921LEN])
|-
| PMIC || Maxim Integrated MAX77851SAWJ+T
|-
| Sub-PMIC || Renesas/Dialog DA9092-AIOV2
|-
| Audio || Realtek ALC5658
|-
| Voice || Intelligo Technology IG2200
|-
| USB 2.0 Hub || Genesys Logic GL852G-OHY60 (Connects to joycons, WiFi/BT IC, with upstream port to SoC)
|-
| USB-C || Cypress CYPD6228-96BZXI (CP10359AT)
|-
| GC ASIC || B2349 GCBRG HAC STD T2010423
|}

Nintendo Switch Brew - User contributions [en]

Switch 2: Hardware

Switch 2: Hardware