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	<id>https://switchbrew.org/w/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=%24andeor</id>
	<title>Nintendo Switch Brew - User contributions [en]</title>
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	<updated>2026-05-15T12:22:06Z</updated>
	<subtitle>User contributions</subtitle>
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	<entry>
		<id>https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2766</id>
		<title>Fuses</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2766"/>
		<updated>2017-10-12T05:37:08Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The Nintendo Switch makes use of Tegra&#039;s fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming.&lt;br /&gt;
&lt;br /&gt;
Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse array, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses.&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
Below is a list of fuse driver registers used by the Switch&#039;s bootloaders.&lt;br /&gt;
&lt;br /&gt;
=== Driver registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_CTRL|FUSE_CTRL]]&lt;br /&gt;
| 0x7000F800&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_ADDR|FUSE_REG_ADDR]]&lt;br /&gt;
| 0x7000F804&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_READ|FUSE_REG_READ]]&lt;br /&gt;
| 0x7000F808&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_WRITE|FUSE_REG_WRITE]]&lt;br /&gt;
| 0x7000F80C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD1&lt;br /&gt;
| 0x7000F810&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD2&lt;br /&gt;
| 0x7000F814&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_PGM1&lt;br /&gt;
| 0x7000F818&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_TIME_PGM2|FUSE_TIME_PGM2]]&lt;br /&gt;
| 0x7000F81C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIV2INTFC&lt;br /&gt;
| 0x7000F820&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FUSEBYPASS&lt;br /&gt;
| 0x7000F824&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIVATEKEYDISABLE&lt;br /&gt;
| 0x7000F828&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_DIS_PGM|FUSE_DIS_PGM]]&lt;br /&gt;
| 0x7000F82C&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_WRITE_ACCESS|FUSE_WRITE_ACCESS]]&lt;br /&gt;
| 0x7000F830&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PWR_GOOD_SW&lt;br /&gt;
| 0x7000F834&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_CTRL ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Fuse command (1 = FUSE_READ; 2 = FUSE_WRITE; 3 = FUSE_SENSE)&lt;br /&gt;
|-&lt;br /&gt;
| 26&lt;br /&gt;
| Fuse power down mode flag (FUSE_CTRL_PD)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Before fuse reading/writing the power down mode must be disabled.&lt;br /&gt;
FUSE_SENSE mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_ADDR ====&lt;br /&gt;
This register takes the address of the fuse to be read/written/sensed.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_READ ====&lt;br /&gt;
This register receives the value read from the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_WRITE ====&lt;br /&gt;
This register takes the value to be written to the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_TIME_PGM2 ====&lt;br /&gt;
This register takes the fuse programming pulse (0xC0 == 19200 kHz).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_DIS_PGM ====&lt;br /&gt;
If set to 0x01, this register disables fuse programming.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_WRITE_ACCESS ====&lt;br /&gt;
If set to 0x01, this register disables software writes to the fuse driver registers.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== Cache registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SKU_INFO|FUSE_SKU_INFO]]&lt;br /&gt;
| 0x7000F910&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_0&lt;br /&gt;
| 0x7000F914&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_IDDQ&lt;br /&gt;
| 0x7000F918&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FT_REV&lt;br /&gt;
| 0x7000F928&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_1&lt;br /&gt;
| 0x7000F92C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_2&lt;br /&gt;
| 0x7000F930&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_0&lt;br /&gt;
| 0x7000F934&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SOC_SPEEDO_1|FUSE_SOC_SPEEDO_1]]&lt;br /&gt;
| 0x7000F938&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_2&lt;br /&gt;
| 0x7000F93C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_FA|FUSE_FA]]&lt;br /&gt;
| 0x7000F948&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_1&lt;br /&gt;
| 0x7000F984&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_2&lt;br /&gt;
| 0x7000F988&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CP_REV&lt;br /&gt;
| 0x7000F990&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_0&lt;br /&gt;
| 0x7000F998&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FIRST_BOOTROM_PATCH_SIZE_REG&lt;br /&gt;
| 0x7000F99C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VP8_ENABLE&lt;br /&gt;
| 0x7000F9C4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM0&lt;br /&gt;
| 0x7000F9C8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM1&lt;br /&gt;
| 0x7000F9CC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM2&lt;br /&gt;
| 0x7000F9D0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM3&lt;br /&gt;
| 0x7000F9D4&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]&lt;br /&gt;
| 0x7000F9D8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM5&lt;br /&gt;
| 0x7000F9DC&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]]&lt;br /&gt;
| 0x7000F9E0&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]]&lt;br /&gt;
| 0x7000F9E4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_USB_CALIB&lt;br /&gt;
| 0x7000F9F0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_DIRECT_CONFIG&lt;br /&gt;
| 0x7000F9F4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VENDOR_CODE&lt;br /&gt;
| 0x7000FA00&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FAB_CODE&lt;br /&gt;
| 0x7000FA04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_0&lt;br /&gt;
| 0x7000FA08&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_1&lt;br /&gt;
| 0x7000FA0C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_WAFER_ID&lt;br /&gt;
| 0x7000FA10&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_X_COORDINATE&lt;br /&gt;
| 0x7000FA14&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_Y_COORDINATE&lt;br /&gt;
| 0x7000FA18&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_GPU_IDDQ&lt;br /&gt;
| 0x7000FA28&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_3&lt;br /&gt;
| 0x7000FA2C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_SUBREVISION&lt;br /&gt;
| 0x7000FA48&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_4&lt;br /&gt;
| 0x7000FA54&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_5&lt;br /&gt;
| 0x7000FA58&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_6&lt;br /&gt;
| 0x7000FA5C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_7&lt;br /&gt;
| 0x7000FA60&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_PRIV_SEC_DIS&lt;br /&gt;
| 0x7000FA64&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_COMMON&lt;br /&gt;
| 0x7000FA80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_8&lt;br /&gt;
| 0x7000FAD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_CALIB&lt;br /&gt;
| 0x7000FB04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_9&lt;br /&gt;
| 0x7000FB1C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_USB_CALIB_EXT&lt;br /&gt;
| 0x7000FB50&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_0&lt;br /&gt;
| 0x7000FB80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_1&lt;br /&gt;
| 0x7000FB84&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_2&lt;br /&gt;
| 0x7000FB88&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_3&lt;br /&gt;
| 0x7000FB8C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_4&lt;br /&gt;
| 0x7000FB90&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SPARE_BIT_5|FUSE_SPARE_BIT_5]]&lt;br /&gt;
| 0x7000FB94&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_6&lt;br /&gt;
| 0x7000FB98&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_7&lt;br /&gt;
| 0x7000FB9C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_8&lt;br /&gt;
| 0x7000FBA0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_9&lt;br /&gt;
| 0x7000FBA4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_10&lt;br /&gt;
| 0x7000FBA8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_11&lt;br /&gt;
| 0x7000FBAC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_12&lt;br /&gt;
| 0x7000FBB0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_13&lt;br /&gt;
| 0x7000FBB4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_14&lt;br /&gt;
| 0x7000FBB8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_15&lt;br /&gt;
| 0x7000FBBC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_16&lt;br /&gt;
| 0x7000FBC0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_17&lt;br /&gt;
| 0x7000FBC4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_18&lt;br /&gt;
| 0x7000FBC8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_19&lt;br /&gt;
| 0x7000FBCC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_20&lt;br /&gt;
| 0x7000FBD0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_21&lt;br /&gt;
| 0x7000FBD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_22&lt;br /&gt;
| 0x7000FBD8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_23&lt;br /&gt;
| 0x7000FBDC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_24&lt;br /&gt;
| 0x7000FBE0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_25&lt;br /&gt;
| 0x7000FBE4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_26&lt;br /&gt;
| 0x7000FBE8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_27&lt;br /&gt;
| 0x7000FBEC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_28&lt;br /&gt;
| 0x7000FBF0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_29&lt;br /&gt;
| 0x7000FBF4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_30&lt;br /&gt;
| 0x7000FBF8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_31&lt;br /&gt;
| 0x7000FBFC&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SKU_INFO ====&lt;br /&gt;
Stores the SKU ID (must be 0x83).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_FA ====&lt;br /&gt;
Stores failure analysis mode.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SOC_SPEEDO_1 ====&lt;br /&gt;
Stores the bootrom patch version.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM4 ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Unit type (3 = debug; 0 = retail)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| Unknown config (must be 1 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| Unknown config mask (must be 0 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 9&lt;br /&gt;
| Unit type mask (0 = debug; 1 = retail)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
This stores some device configuration parameters.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM6 ====&lt;br /&gt;
This register returns the value programmed into index 0x3A of the fuse array. &lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM7 ====&lt;br /&gt;
This register returns the value programmed into index 0x3C of the fuse array.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SPARE_BIT_5 ====&lt;br /&gt;
Must be non-zero on retail units, otherwise the first bootloader panics.&lt;br /&gt;
On debug units it can be zero, which tells the bootloader to choose from two debug master key seeds. If set to non-zero on a debug unit, it tells the bootloader to choose from two retail master key seeds (only the last one matches the retail master key seed).&lt;br /&gt;
&lt;br /&gt;
== eFuses ==&lt;br /&gt;
The actual hardware fuses can be programmed through the fuse driver after enabling fuse programming.&lt;br /&gt;
&lt;br /&gt;
Below is a list of common fuse indexes used by Tegra devices (and applicable to the Switch).&lt;br /&gt;
Note that the indexes are relative to the start of the fuse array and each element is a 4 byte word. A single fuse write operation always writes the same word at both fuse_array + 0 (PRIMARY_ALIAS) and fuse_array + 1 (REDUNDANT_ALIAS).&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Index&lt;br /&gt;
!  Bits&lt;br /&gt;
|-&lt;br /&gt;
| jtag_disable&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_production_mode&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_lock&lt;br /&gt;
| 0x00&lt;br /&gt;
| 4&lt;br /&gt;
|-&lt;br /&gt;
| public_key&lt;br /&gt;
| 0x0C&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| secure_boot_key&lt;br /&gt;
| 0x22&lt;br /&gt;
| 128&lt;br /&gt;
|-&lt;br /&gt;
| device_key&lt;br /&gt;
| 0x2A&lt;br /&gt;
| 32&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_cfg&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 16&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_sel&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 3&lt;br /&gt;
|-&lt;br /&gt;
| sw_reserved&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 12&lt;br /&gt;
|-&lt;br /&gt;
| ignore_dev_sel_straps&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| [[#odm_reserved|odm_reserved]]&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| pkc_disable&lt;br /&gt;
| 0x52&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== odm_reserved ===&lt;br /&gt;
The first bootloader only burns fuses in this region.&lt;br /&gt;
Both fuse indexes 0x3A (odm_reserved + 0x0C) and 0x3C (odm_reserved + 0x0E) are used for anti-downgrade control. These fuses will have their values cached into [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]] and [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]].&lt;br /&gt;
&lt;br /&gt;
== Anti-downgrade ==&lt;br /&gt;
The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading.&lt;br /&gt;
How many fuses are expected to be burnt depends the device&#039;s unit type as below.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! System version&lt;br /&gt;
! Expected number of burnt fuses (retail)&lt;br /&gt;
! Expected number of burnt fuses (non-retail)&lt;br /&gt;
|-&lt;br /&gt;
| 1.0.0&lt;br /&gt;
| 1&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 2.0.0-2.3.0&lt;br /&gt;
| 2&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.0&lt;br /&gt;
| 3&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.1-3.0.2&lt;br /&gt;
| 4&lt;br /&gt;
| 1&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
If too many fuses are burnt the bootloader will panic immediately.&lt;br /&gt;
&lt;br /&gt;
If too few are burnt, the bootloader will enable fuse programming and write the expected value to fuse indexes 0x3A and 0x3C. Afterwards, fuse programming is disabled and a magic value (0x21 == TEGRA210) is written to PMC_SCRATCH200 register (0x7000EC40). Finally, the watchdog timer is initialized and programmed to force a reset.&lt;br /&gt;
&lt;br /&gt;
On a subsequent boot, after the anti-downgrade fuses are checked again, the PMC_RST_STATUS register (0x7000E5B4) is checked and if set to 0x01 (watchdog reset) the PMC_SCRATCH200 register (0x7000EC40) will be checked for the magic value (0x21 == TEGRA210).&lt;br /&gt;
PMC_RST_STATUS will only be set back to 0 (power on reset) if the fuse count matches the new expected value, otherwise the system will panic.&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2765</id>
		<title>Fuses</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2765"/>
		<updated>2017-10-12T05:33:28Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The Nintendo Switch makes use of Tegra&#039;s fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming.&lt;br /&gt;
&lt;br /&gt;
Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse array, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses.&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
Below is a list of fuse driver registers used by the Switch&#039;s bootloaders.&lt;br /&gt;
&lt;br /&gt;
=== Driver registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_CTRL|FUSE_CTRL]]&lt;br /&gt;
| 0x7000F800&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_ADDR|FUSE_REG_ADDR]]&lt;br /&gt;
| 0x7000F804&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_READ|FUSE_REG_READ]]&lt;br /&gt;
| 0x7000F808&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_WRITE|FUSE_REG_WRITE]]&lt;br /&gt;
| 0x7000F80C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD1&lt;br /&gt;
| 0x7000F810&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD2&lt;br /&gt;
| 0x7000F814&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_PGM1&lt;br /&gt;
| 0x7000F818&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_TIME_PGM2|FUSE_TIME_PGM2]]&lt;br /&gt;
| 0x7000F81C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIV2INTFC&lt;br /&gt;
| 0x7000F820&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FUSEBYPASS&lt;br /&gt;
| 0x7000F824&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIVATEKEYDISABLE&lt;br /&gt;
| 0x7000F828&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_DIS_PGM|FUSE_DIS_PGM]]&lt;br /&gt;
| 0x7000F82C&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_WRITE_ACCESS|FUSE_WRITE_ACCESS]]&lt;br /&gt;
| 0x7000F830&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PWR_GOOD_SW&lt;br /&gt;
| 0x7000F834&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_CTRL ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Fuse command (1 = FUSE_READ; 2 = FUSE_WRITE; 3 = FUSE_SENSE)&lt;br /&gt;
|-&lt;br /&gt;
| 26&lt;br /&gt;
| Fuse power down mode flag (FUSE_CTRL_PD)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Before fuse reading/writing the power down mode must be disabled.&lt;br /&gt;
FUSE_SENSE mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_ADDR ====&lt;br /&gt;
This register takes the address of the fuse to be read/written/sensed.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_READ ====&lt;br /&gt;
This register receives the value read from the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_WRITE ====&lt;br /&gt;
This register takes the value to be written to the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_TIME_PGM2 ====&lt;br /&gt;
This register takes the fuse programming pulse (0xC0 == 19200 kHz).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_DIS_PGM ====&lt;br /&gt;
If set to 0x01, this register disables fuse programming.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_WRITE_ACCESS ====&lt;br /&gt;
If set to 0x01, this register disables software writes to the fuse driver registers.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== Cache registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SKU_INFO|FUSE_SKU_INFO]]&lt;br /&gt;
| 0x7000F910&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_0&lt;br /&gt;
| 0x7000F914&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_IDDQ&lt;br /&gt;
| 0x7000F918&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FT_REV&lt;br /&gt;
| 0x7000F928&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_1&lt;br /&gt;
| 0x7000F92C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_2&lt;br /&gt;
| 0x7000F930&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_0&lt;br /&gt;
| 0x7000F934&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SOC_SPEEDO_1|FUSE_SOC_SPEEDO_1]]&lt;br /&gt;
| 0x7000F938&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_2&lt;br /&gt;
| 0x7000F93C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_FA|FUSE_FA]]&lt;br /&gt;
| 0x7000F948&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_1&lt;br /&gt;
| 0x7000F984&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_2&lt;br /&gt;
| 0x7000F988&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CP_REV&lt;br /&gt;
| 0x7000F990&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_0&lt;br /&gt;
| 0x7000F998&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FIRST_BOOTROM_PATCH_SIZE_REG&lt;br /&gt;
| 0x7000F99C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VP8_ENABLE&lt;br /&gt;
| 0x7000F9C4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM0&lt;br /&gt;
| 0x7000F9C8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM1&lt;br /&gt;
| 0x7000F9CC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM2&lt;br /&gt;
| 0x7000F9D0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM3&lt;br /&gt;
| 0x7000F9D4&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]&lt;br /&gt;
| 0x7000F9D8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM5&lt;br /&gt;
| 0x7000F9DC&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]]&lt;br /&gt;
| 0x7000F9E0&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]]&lt;br /&gt;
| 0x7000F9E4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_USB_CALIB&lt;br /&gt;
| 0x7000F9F0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_DIRECT_CONFIG&lt;br /&gt;
| 0x7000F9F4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VENDOR_CODE&lt;br /&gt;
| 0x7000FA00&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FAB_CODE&lt;br /&gt;
| 0x7000FA04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_0&lt;br /&gt;
| 0x7000FA08&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_1&lt;br /&gt;
| 0x7000FA0C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_WAFER_ID&lt;br /&gt;
| 0x7000FA10&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_X_COORDINATE&lt;br /&gt;
| 0x7000FA14&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_Y_COORDINATE&lt;br /&gt;
| 0x7000FA18&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_GPU_IDDQ&lt;br /&gt;
| 0x7000FA28&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_3&lt;br /&gt;
| 0x7000FA2C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_SUBREVISION&lt;br /&gt;
| 0x7000FA48&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_4&lt;br /&gt;
| 0x7000FA54&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_5&lt;br /&gt;
| 0x7000FA58&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_6&lt;br /&gt;
| 0x7000FA5C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_7&lt;br /&gt;
| 0x7000FA60&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_PRIV_SEC_DIS&lt;br /&gt;
| 0x7000FA64&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_COMMON&lt;br /&gt;
| 0x7000FA80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_8&lt;br /&gt;
| 0x7000FAD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_CALIB&lt;br /&gt;
| 0x7000FB04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_9&lt;br /&gt;
| 0x7000FB1C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_USB_CALIB_EXT&lt;br /&gt;
| 0x7000FB50&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_0&lt;br /&gt;
| 0x7000FB80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_1&lt;br /&gt;
| 0x7000FB84&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_2&lt;br /&gt;
| 0x7000FB88&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_3&lt;br /&gt;
| 0x7000FB8C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_4&lt;br /&gt;
| 0x7000FB90&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SPARE_BIT_5|FUSE_SPARE_BIT_5]]&lt;br /&gt;
| 0x7000FB94&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_6&lt;br /&gt;
| 0x7000FB98&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_7&lt;br /&gt;
| 0x7000FB9C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_8&lt;br /&gt;
| 0x7000FBA0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_9&lt;br /&gt;
| 0x7000FBA4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_10&lt;br /&gt;
| 0x7000FBA8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_11&lt;br /&gt;
| 0x7000FBAC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_12&lt;br /&gt;
| 0x7000FBB0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_13&lt;br /&gt;
| 0x7000FBB4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_14&lt;br /&gt;
| 0x7000FBB8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_15&lt;br /&gt;
| 0x7000FBBC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_16&lt;br /&gt;
| 0x7000FBC0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_17&lt;br /&gt;
| 0x7000FBC4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_18&lt;br /&gt;
| 0x7000FBC8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_19&lt;br /&gt;
| 0x7000FBCC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_20&lt;br /&gt;
| 0x7000FBD0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_21&lt;br /&gt;
| 0x7000FBD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_22&lt;br /&gt;
| 0x7000FBD8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_23&lt;br /&gt;
| 0x7000FBDC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_24&lt;br /&gt;
| 0x7000FBE0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_25&lt;br /&gt;
| 0x7000FBE4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_26&lt;br /&gt;
| 0x7000FBE8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_27&lt;br /&gt;
| 0x7000FBEC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_28&lt;br /&gt;
| 0x7000FBF0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_29&lt;br /&gt;
| 0x7000FBF4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_30&lt;br /&gt;
| 0x7000FBF8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_31&lt;br /&gt;
| 0x7000FBFC&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SKU_INFO ====&lt;br /&gt;
Stores the SKU ID (must be 0x83).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_FA ====&lt;br /&gt;
Stores failure analysis (0 = factory mode).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SOC_SPEEDO_1 ====&lt;br /&gt;
Stores the bootrom patch version.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM4 ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Unit type (3 = debug; 0 = retail)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| Unknown config (must be 1 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| Unknown config mask (must be 0 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 9&lt;br /&gt;
| Unit type mask (0 = debug; 1 = retail)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
This stores some device configuration parameters.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM6 ====&lt;br /&gt;
This register returns the value programmed into index 0x3A of the fuse array. &lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM7 ====&lt;br /&gt;
This register returns the value programmed into index 0x3C of the fuse array.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SPARE_BIT_5 ====&lt;br /&gt;
Must be non-zero on retail units, otherwise the first bootloader panics.&lt;br /&gt;
On debug units it can be zero, which tells the bootloader to choose from two debug master key seeds. If set to non-zero on a debug unit, it tells the bootloader to choose from two retail master key seeds (only the last one matches the retail master key seed).&lt;br /&gt;
&lt;br /&gt;
== eFuses ==&lt;br /&gt;
The actual hardware fuses can be programmed through the fuse driver after enabling fuse programming.&lt;br /&gt;
&lt;br /&gt;
Below is a list of common fuse indexes used by Tegra devices (and applicable to the Switch).&lt;br /&gt;
Note that the indexes are relative to the start of the fuse array and each element is a 4 byte word. A single fuse write operation always writes the same word at both fuse_array + 0 (PRIMARY_ALIAS) and fuse_array + 1 (REDUNDANT_ALIAS).&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Index&lt;br /&gt;
!  Bits&lt;br /&gt;
|-&lt;br /&gt;
| jtag_disable&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_production_mode&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_lock&lt;br /&gt;
| 0x00&lt;br /&gt;
| 4&lt;br /&gt;
|-&lt;br /&gt;
| public_key&lt;br /&gt;
| 0x0C&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| secure_boot_key&lt;br /&gt;
| 0x22&lt;br /&gt;
| 128&lt;br /&gt;
|-&lt;br /&gt;
| device_key&lt;br /&gt;
| 0x2A&lt;br /&gt;
| 32&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_cfg&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 16&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_sel&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 3&lt;br /&gt;
|-&lt;br /&gt;
| sw_reserved&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 12&lt;br /&gt;
|-&lt;br /&gt;
| ignore_dev_sel_straps&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| [[#odm_reserved|odm_reserved]]&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| pkc_disable&lt;br /&gt;
| 0x52&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== odm_reserved ===&lt;br /&gt;
The first bootloader only burns fuses in this region.&lt;br /&gt;
Both fuse indexes 0x3A (odm_reserved + 0x0C) and 0x3C (odm_reserved + 0x0E) are used for anti-downgrade control. These fuses will have their values cached into [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]] and [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]].&lt;br /&gt;
&lt;br /&gt;
== Anti-downgrade ==&lt;br /&gt;
The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading.&lt;br /&gt;
How many fuses are expected to be burnt depends the device&#039;s unit type as below.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! System version&lt;br /&gt;
! Expected number of burnt fuses (retail)&lt;br /&gt;
! Expected number of burnt fuses (non-retail)&lt;br /&gt;
|-&lt;br /&gt;
| 1.0.0&lt;br /&gt;
| 1&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 2.0.0-2.3.0&lt;br /&gt;
| 2&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.0&lt;br /&gt;
| 3&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.1-3.0.2&lt;br /&gt;
| 4&lt;br /&gt;
| 1&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
If too many fuses are burnt the bootloader will panic immediately.&lt;br /&gt;
&lt;br /&gt;
If too few are burnt, the bootloader will enable fuse programming and write the expected value to fuse indexes 0x3A and 0x3C. Afterwards, fuse programming is disabled and a magic value (0x21 == TEGRA210) is written to PMC_SCRATCH200 register (0x7000EC40). Finally, the watchdog timer is initialized and programmed to force a reset.&lt;br /&gt;
&lt;br /&gt;
On a subsequent boot, after the anti-downgrade fuses are checked again, the PMC_RST_STATUS register (0x7000E5B4) is checked and if set to 0x01 (watchdog reset) the PMC_SCRATCH200 register (0x7000EC40) will be checked for the magic value (0x21 == TEGRA210).&lt;br /&gt;
PMC_RST_STATUS will only be set back to 0 (power on reset) if the fuse count matches the new expected value, otherwise the system will panic.&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2764</id>
		<title>Fuses</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2764"/>
		<updated>2017-10-12T05:20:27Z</updated>

		<summary type="html">&lt;p&gt;$andeor: Removed TSENSOR1 by accident&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The Nintendo Switch makes use of Tegra&#039;s fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming.&lt;br /&gt;
&lt;br /&gt;
Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse array, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses.&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
Below is a list of fuse driver registers used by the Switch&#039;s bootloaders.&lt;br /&gt;
&lt;br /&gt;
=== Driver registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_CTRL|FUSE_CTRL]]&lt;br /&gt;
| 0x7000F800&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_ADDR|FUSE_REG_ADDR]]&lt;br /&gt;
| 0x7000F804&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_READ|FUSE_REG_READ]]&lt;br /&gt;
| 0x7000F808&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_WRITE|FUSE_REG_WRITE]]&lt;br /&gt;
| 0x7000F80C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD1&lt;br /&gt;
| 0x7000F810&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD2&lt;br /&gt;
| 0x7000F814&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_PGM1&lt;br /&gt;
| 0x7000F818&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_TIME_PGM2|FUSE_TIME_PGM2]]&lt;br /&gt;
| 0x7000F81C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIV2INTFC&lt;br /&gt;
| 0x7000F820&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FUSEBYPASS&lt;br /&gt;
| 0x7000F824&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIVATEKEYDISABLE&lt;br /&gt;
| 0x7000F828&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_DIS_PGM|FUSE_DIS_PGM]]&lt;br /&gt;
| 0x7000F82C&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_WRITE_ACCESS|FUSE_WRITE_ACCESS]]&lt;br /&gt;
| 0x7000F830&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PWR_GOOD_SW&lt;br /&gt;
| 0x7000F834&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_CTRL ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Fuse command (1 = FUSE_READ; 2 = FUSE_WRITE; 3 = FUSE_SENSE)&lt;br /&gt;
|-&lt;br /&gt;
| 26&lt;br /&gt;
| Fuse power down mode flag (FUSE_CTRL_PD)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Before fuse reading/writing the power down mode must be disabled.&lt;br /&gt;
FUSE_SENSE mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_ADDR ====&lt;br /&gt;
This register takes the address of the fuse to be read/written/sensed.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_READ ====&lt;br /&gt;
This register receives the value read from the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_WRITE ====&lt;br /&gt;
This register takes the value to be written to the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_TIME_PGM2 ====&lt;br /&gt;
This register takes the fuse programming pulse (0xC0 == 19200 kHz).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_DIS_PGM ====&lt;br /&gt;
If set to 0x01, this register disables fuse programming.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_WRITE_ACCESS ====&lt;br /&gt;
If set to 0x01, this register disables software writes to the fuse driver registers.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== Cache registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SKU_INFO|FUSE_SKU_INFO]]&lt;br /&gt;
| 0x7000F910&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_0&lt;br /&gt;
| 0x7000F914&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_IDDQ&lt;br /&gt;
| 0x7000F918&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FT_REV&lt;br /&gt;
| 0x7000F928&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_1&lt;br /&gt;
| 0x7000F92C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_2&lt;br /&gt;
| 0x7000F930&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_0&lt;br /&gt;
| 0x7000F934&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SOC_SPEEDO_1|FUSE_SOC_SPEEDO_1]]&lt;br /&gt;
| 0x7000F938&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_2&lt;br /&gt;
| 0x7000F93C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_FA|FUSE_FA]]&lt;br /&gt;
| 0x7000F948&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_1&lt;br /&gt;
| 0x7000F984&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_2&lt;br /&gt;
| 0x7000F988&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CP_REV&lt;br /&gt;
| 0x7000F990&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_0&lt;br /&gt;
| 0x7000F998&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FIRST_BOOTROM_PATCH_SIZE_REG&lt;br /&gt;
| 0x7000F99C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VP8_ENABLE&lt;br /&gt;
| 0x7000F9C4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM0&lt;br /&gt;
| 0x7000F9C8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM1&lt;br /&gt;
| 0x7000F9CC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM2&lt;br /&gt;
| 0x7000F9D0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM3&lt;br /&gt;
| 0x7000F9D4&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]&lt;br /&gt;
| 0x7000F9D8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM5&lt;br /&gt;
| 0x7000F9DC&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]]&lt;br /&gt;
| 0x7000F9E0&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]]&lt;br /&gt;
| 0x7000F9E4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_USB_CALIB&lt;br /&gt;
| 0x7000F9F0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_DIRECT_CONFIG&lt;br /&gt;
| 0x7000F9F4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VENDOR_CODE&lt;br /&gt;
| 0x7000FA00&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FAB_CODE&lt;br /&gt;
| 0x7000FA04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_0&lt;br /&gt;
| 0x7000FA08&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_1&lt;br /&gt;
| 0x7000FA0C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_WAFER_ID&lt;br /&gt;
| 0x7000FA10&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_X_COORDINATE&lt;br /&gt;
| 0x7000FA14&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_Y_COORDINATE&lt;br /&gt;
| 0x7000FA18&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_GPU_IDDQ&lt;br /&gt;
| 0x7000FA28&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_3&lt;br /&gt;
| 0x7000FA2C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_SUBREVISION&lt;br /&gt;
| 0x7000FA48&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_4&lt;br /&gt;
| 0x7000FA54&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_5&lt;br /&gt;
| 0x7000FA58&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_6&lt;br /&gt;
| 0x7000FA5C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_7&lt;br /&gt;
| 0x7000FA60&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_PRIV_SEC_DIS&lt;br /&gt;
| 0x7000FA64&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_COMMON&lt;br /&gt;
| 0x7000FA80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_8&lt;br /&gt;
| 0x7000FAD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_CALIB&lt;br /&gt;
| 0x7000FB04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_9&lt;br /&gt;
| 0x7000FB1C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_USB_CALIB_EXT&lt;br /&gt;
| 0x7000FB50&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_0&lt;br /&gt;
| 0x7000FB80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_1&lt;br /&gt;
| 0x7000FB84&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_2&lt;br /&gt;
| 0x7000FB88&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_3&lt;br /&gt;
| 0x7000FB8C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_4&lt;br /&gt;
| 0x7000FB90&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SPARE_BIT_5|FUSE_SPARE_BIT_5]]&lt;br /&gt;
| 0x7000FB94&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_6&lt;br /&gt;
| 0x7000FB98&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_7&lt;br /&gt;
| 0x7000FB9C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_8&lt;br /&gt;
| 0x7000FBA0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_9&lt;br /&gt;
| 0x7000FBA4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_10&lt;br /&gt;
| 0x7000FBA8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_11&lt;br /&gt;
| 0x7000FBAC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_12&lt;br /&gt;
| 0x7000FBB0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_13&lt;br /&gt;
| 0x7000FBB4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_14&lt;br /&gt;
| 0x7000FBB8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_15&lt;br /&gt;
| 0x7000FBBC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_16&lt;br /&gt;
| 0x7000FBC0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_17&lt;br /&gt;
| 0x7000FBC4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_18&lt;br /&gt;
| 0x7000FBC8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_19&lt;br /&gt;
| 0x7000FBCC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_20&lt;br /&gt;
| 0x7000FBD0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_21&lt;br /&gt;
| 0x7000FBD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_22&lt;br /&gt;
| 0x7000FBD8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_23&lt;br /&gt;
| 0x7000FBDC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_24&lt;br /&gt;
| 0x7000FBE0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_25&lt;br /&gt;
| 0x7000FBE4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_26&lt;br /&gt;
| 0x7000FBE8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_27&lt;br /&gt;
| 0x7000FBEC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_28&lt;br /&gt;
| 0x7000FBF0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_29&lt;br /&gt;
| 0x7000FBF4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_30&lt;br /&gt;
| 0x7000FBF8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_31&lt;br /&gt;
| 0x7000FBFC&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SKU_INFO ====&lt;br /&gt;
Stores the SKU ID (must be 0x83).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_FA ====&lt;br /&gt;
Stores if in factory mode (0 = factory).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SOC_SPEEDO_1 ====&lt;br /&gt;
Stores the bootrom patch version.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM4 ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Unit type (3 = debug; 0 = retail)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| Unknown config (must be 1 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| Unknown config mask (must be 0 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 9&lt;br /&gt;
| Unit type mask (0 = debug; 1 = retail)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
This stores some device configuration parameters.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM6 ====&lt;br /&gt;
This register returns the value programmed into index 0x3A of the fuse array. &lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM7 ====&lt;br /&gt;
This register returns the value programmed into index 0x3C of the fuse array.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SPARE_BIT_5 ====&lt;br /&gt;
Must be non-zero on retail units, otherwise the first bootloader panics.&lt;br /&gt;
On debug units it can be zero, which tells the bootloader to choose from two debug master key seeds. If set to non-zero on a debug unit, it tells the bootloader to choose from two retail master key seeds (only the last one matches the retail master key seed).&lt;br /&gt;
&lt;br /&gt;
== eFuses ==&lt;br /&gt;
The actual hardware fuses can be programmed through the fuse driver after enabling fuse programming.&lt;br /&gt;
&lt;br /&gt;
Below is a list of common fuse indexes used by Tegra devices (and applicable to the Switch).&lt;br /&gt;
Note that the indexes are relative to the start of the fuse array and each element is a 4 byte word. A single fuse write operation always writes the same word at both fuse_array + 0 (PRIMARY_ALIAS) and fuse_array + 1 (REDUNDANT_ALIAS).&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Index&lt;br /&gt;
!  Bits&lt;br /&gt;
|-&lt;br /&gt;
| jtag_disable&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_production_mode&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_lock&lt;br /&gt;
| 0x00&lt;br /&gt;
| 4&lt;br /&gt;
|-&lt;br /&gt;
| public_key&lt;br /&gt;
| 0x0C&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| secure_boot_key&lt;br /&gt;
| 0x22&lt;br /&gt;
| 128&lt;br /&gt;
|-&lt;br /&gt;
| device_key&lt;br /&gt;
| 0x2A&lt;br /&gt;
| 32&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_cfg&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 16&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_sel&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 3&lt;br /&gt;
|-&lt;br /&gt;
| sw_reserved&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 12&lt;br /&gt;
|-&lt;br /&gt;
| ignore_dev_sel_straps&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| [[#odm_reserved|odm_reserved]]&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| pkc_disable&lt;br /&gt;
| 0x52&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== odm_reserved ===&lt;br /&gt;
The first bootloader only burns fuses in this region.&lt;br /&gt;
Both fuse indexes 0x3A (odm_reserved + 0x0C) and 0x3C (odm_reserved + 0x0E) are used for anti-downgrade control. These fuses will have their values cached into [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]] and [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]].&lt;br /&gt;
&lt;br /&gt;
== Anti-downgrade ==&lt;br /&gt;
The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading.&lt;br /&gt;
How many fuses are expected to be burnt depends the device&#039;s unit type as below.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! System version&lt;br /&gt;
! Expected number of burnt fuses (retail)&lt;br /&gt;
! Expected number of burnt fuses (non-retail)&lt;br /&gt;
|-&lt;br /&gt;
| 1.0.0&lt;br /&gt;
| 1&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 2.0.0-2.3.0&lt;br /&gt;
| 2&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.0&lt;br /&gt;
| 3&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.1-3.0.2&lt;br /&gt;
| 4&lt;br /&gt;
| 1&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
If too many fuses are burnt the bootloader will panic immediately.&lt;br /&gt;
&lt;br /&gt;
If too few are burnt, the bootloader will enable fuse programming and write the expected value to fuse indexes 0x3A and 0x3C. Afterwards, fuse programming is disabled and a magic value (0x21 == TEGRA210) is written to PMC_SCRATCH200 register (0x7000EC40). Finally, the watchdog timer is initialized and programmed to force a reset.&lt;br /&gt;
&lt;br /&gt;
On a subsequent boot, after the anti-downgrade fuses are checked again, the PMC_RST_STATUS register (0x7000E5B4) is checked and if set to 0x01 (watchdog reset) the PMC_SCRATCH200 register (0x7000EC40) will be checked for the magic value (0x21 == TEGRA210).&lt;br /&gt;
PMC_RST_STATUS will only be set back to 0 (power on reset) if the fuse count matches the new expected value, otherwise the system will panic.&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2763</id>
		<title>Fuses</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2763"/>
		<updated>2017-10-12T05:18:49Z</updated>

		<summary type="html">&lt;p&gt;$andeor: duplicate removal&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The Nintendo Switch makes use of Tegra&#039;s fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming.&lt;br /&gt;
&lt;br /&gt;
Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse array, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses.&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
Below is a list of fuse driver registers used by the Switch&#039;s bootloaders.&lt;br /&gt;
&lt;br /&gt;
=== Driver registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_CTRL|FUSE_CTRL]]&lt;br /&gt;
| 0x7000F800&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_ADDR|FUSE_REG_ADDR]]&lt;br /&gt;
| 0x7000F804&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_READ|FUSE_REG_READ]]&lt;br /&gt;
| 0x7000F808&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_WRITE|FUSE_REG_WRITE]]&lt;br /&gt;
| 0x7000F80C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD1&lt;br /&gt;
| 0x7000F810&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD2&lt;br /&gt;
| 0x7000F814&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_PGM1&lt;br /&gt;
| 0x7000F818&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_TIME_PGM2|FUSE_TIME_PGM2]]&lt;br /&gt;
| 0x7000F81C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIV2INTFC&lt;br /&gt;
| 0x7000F820&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FUSEBYPASS&lt;br /&gt;
| 0x7000F824&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIVATEKEYDISABLE&lt;br /&gt;
| 0x7000F828&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_DIS_PGM|FUSE_DIS_PGM]]&lt;br /&gt;
| 0x7000F82C&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_WRITE_ACCESS|FUSE_WRITE_ACCESS]]&lt;br /&gt;
| 0x7000F830&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PWR_GOOD_SW&lt;br /&gt;
| 0x7000F834&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_CTRL ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Fuse command (1 = FUSE_READ; 2 = FUSE_WRITE; 3 = FUSE_SENSE)&lt;br /&gt;
|-&lt;br /&gt;
| 26&lt;br /&gt;
| Fuse power down mode flag (FUSE_CTRL_PD)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Before fuse reading/writing the power down mode must be disabled.&lt;br /&gt;
FUSE_SENSE mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_ADDR ====&lt;br /&gt;
This register takes the address of the fuse to be read/written/sensed.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_READ ====&lt;br /&gt;
This register receives the value read from the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_WRITE ====&lt;br /&gt;
This register takes the value to be written to the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_TIME_PGM2 ====&lt;br /&gt;
This register takes the fuse programming pulse (0xC0 == 19200 kHz).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_DIS_PGM ====&lt;br /&gt;
If set to 0x01, this register disables fuse programming.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_WRITE_ACCESS ====&lt;br /&gt;
If set to 0x01, this register disables software writes to the fuse driver registers.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== Cache registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SKU_INFO|FUSE_SKU_INFO]]&lt;br /&gt;
| 0x7000F910&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_0&lt;br /&gt;
| 0x7000F914&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_IDDQ&lt;br /&gt;
| 0x7000F918&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FT_REV&lt;br /&gt;
| 0x7000F928&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_1&lt;br /&gt;
| 0x7000F92C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_2&lt;br /&gt;
| 0x7000F930&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_0&lt;br /&gt;
| 0x7000F934&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SOC_SPEEDO_1|FUSE_SOC_SPEEDO_1]]&lt;br /&gt;
| 0x7000F938&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_2&lt;br /&gt;
| 0x7000F93C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_FA|FUSE_FA]]&lt;br /&gt;
| 0x7000F948&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_2&lt;br /&gt;
| 0x7000F988&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CP_REV&lt;br /&gt;
| 0x7000F990&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_0&lt;br /&gt;
| 0x7000F998&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FIRST_BOOTROM_PATCH_SIZE_REG&lt;br /&gt;
| 0x7000F99C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VP8_ENABLE&lt;br /&gt;
| 0x7000F9C4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM0&lt;br /&gt;
| 0x7000F9C8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM1&lt;br /&gt;
| 0x7000F9CC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM2&lt;br /&gt;
| 0x7000F9D0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM3&lt;br /&gt;
| 0x7000F9D4&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]&lt;br /&gt;
| 0x7000F9D8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM5&lt;br /&gt;
| 0x7000F9DC&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]]&lt;br /&gt;
| 0x7000F9E0&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]]&lt;br /&gt;
| 0x7000F9E4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_USB_CALIB&lt;br /&gt;
| 0x7000F9F0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_DIRECT_CONFIG&lt;br /&gt;
| 0x7000F9F4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VENDOR_CODE&lt;br /&gt;
| 0x7000FA00&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FAB_CODE&lt;br /&gt;
| 0x7000FA04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_0&lt;br /&gt;
| 0x7000FA08&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_1&lt;br /&gt;
| 0x7000FA0C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_WAFER_ID&lt;br /&gt;
| 0x7000FA10&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_X_COORDINATE&lt;br /&gt;
| 0x7000FA14&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_Y_COORDINATE&lt;br /&gt;
| 0x7000FA18&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_GPU_IDDQ&lt;br /&gt;
| 0x7000FA28&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_3&lt;br /&gt;
| 0x7000FA2C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_SUBREVISION&lt;br /&gt;
| 0x7000FA48&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_4&lt;br /&gt;
| 0x7000FA54&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_5&lt;br /&gt;
| 0x7000FA58&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_6&lt;br /&gt;
| 0x7000FA5C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_7&lt;br /&gt;
| 0x7000FA60&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_PRIV_SEC_DIS&lt;br /&gt;
| 0x7000FA64&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_COMMON&lt;br /&gt;
| 0x7000FA80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_8&lt;br /&gt;
| 0x7000FAD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_CALIB&lt;br /&gt;
| 0x7000FB04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_9&lt;br /&gt;
| 0x7000FB1C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_USB_CALIB_EXT&lt;br /&gt;
| 0x7000FB50&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_0&lt;br /&gt;
| 0x7000FB80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_1&lt;br /&gt;
| 0x7000FB84&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_2&lt;br /&gt;
| 0x7000FB88&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_3&lt;br /&gt;
| 0x7000FB8C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_4&lt;br /&gt;
| 0x7000FB90&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SPARE_BIT_5|FUSE_SPARE_BIT_5]]&lt;br /&gt;
| 0x7000FB94&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_6&lt;br /&gt;
| 0x7000FB98&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_7&lt;br /&gt;
| 0x7000FB9C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_8&lt;br /&gt;
| 0x7000FBA0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_9&lt;br /&gt;
| 0x7000FBA4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_10&lt;br /&gt;
| 0x7000FBA8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_11&lt;br /&gt;
| 0x7000FBAC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_12&lt;br /&gt;
| 0x7000FBB0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_13&lt;br /&gt;
| 0x7000FBB4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_14&lt;br /&gt;
| 0x7000FBB8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_15&lt;br /&gt;
| 0x7000FBBC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_16&lt;br /&gt;
| 0x7000FBC0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_17&lt;br /&gt;
| 0x7000FBC4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_18&lt;br /&gt;
| 0x7000FBC8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_19&lt;br /&gt;
| 0x7000FBCC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_20&lt;br /&gt;
| 0x7000FBD0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_21&lt;br /&gt;
| 0x7000FBD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_22&lt;br /&gt;
| 0x7000FBD8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_23&lt;br /&gt;
| 0x7000FBDC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_24&lt;br /&gt;
| 0x7000FBE0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_25&lt;br /&gt;
| 0x7000FBE4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_26&lt;br /&gt;
| 0x7000FBE8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_27&lt;br /&gt;
| 0x7000FBEC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_28&lt;br /&gt;
| 0x7000FBF0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_29&lt;br /&gt;
| 0x7000FBF4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_30&lt;br /&gt;
| 0x7000FBF8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_31&lt;br /&gt;
| 0x7000FBFC&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SKU_INFO ====&lt;br /&gt;
Stores the SKU ID (must be 0x83).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_FA ====&lt;br /&gt;
Stores if in factory mode (0 = factory).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SOC_SPEEDO_1 ====&lt;br /&gt;
Stores the bootrom patch version.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM4 ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Unit type (3 = debug; 0 = retail)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| Unknown config (must be 1 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| Unknown config mask (must be 0 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 9&lt;br /&gt;
| Unit type mask (0 = debug; 1 = retail)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
This stores some device configuration parameters.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM6 ====&lt;br /&gt;
This register returns the value programmed into index 0x3A of the fuse array. &lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM7 ====&lt;br /&gt;
This register returns the value programmed into index 0x3C of the fuse array.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SPARE_BIT_5 ====&lt;br /&gt;
Must be non-zero on retail units, otherwise the first bootloader panics.&lt;br /&gt;
On debug units it can be zero, which tells the bootloader to choose from two debug master key seeds. If set to non-zero on a debug unit, it tells the bootloader to choose from two retail master key seeds (only the last one matches the retail master key seed).&lt;br /&gt;
&lt;br /&gt;
== eFuses ==&lt;br /&gt;
The actual hardware fuses can be programmed through the fuse driver after enabling fuse programming.&lt;br /&gt;
&lt;br /&gt;
Below is a list of common fuse indexes used by Tegra devices (and applicable to the Switch).&lt;br /&gt;
Note that the indexes are relative to the start of the fuse array and each element is a 4 byte word. A single fuse write operation always writes the same word at both fuse_array + 0 (PRIMARY_ALIAS) and fuse_array + 1 (REDUNDANT_ALIAS).&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Index&lt;br /&gt;
!  Bits&lt;br /&gt;
|-&lt;br /&gt;
| jtag_disable&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_production_mode&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_lock&lt;br /&gt;
| 0x00&lt;br /&gt;
| 4&lt;br /&gt;
|-&lt;br /&gt;
| public_key&lt;br /&gt;
| 0x0C&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| secure_boot_key&lt;br /&gt;
| 0x22&lt;br /&gt;
| 128&lt;br /&gt;
|-&lt;br /&gt;
| device_key&lt;br /&gt;
| 0x2A&lt;br /&gt;
| 32&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_cfg&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 16&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_sel&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 3&lt;br /&gt;
|-&lt;br /&gt;
| sw_reserved&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 12&lt;br /&gt;
|-&lt;br /&gt;
| ignore_dev_sel_straps&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| [[#odm_reserved|odm_reserved]]&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| pkc_disable&lt;br /&gt;
| 0x52&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== odm_reserved ===&lt;br /&gt;
The first bootloader only burns fuses in this region.&lt;br /&gt;
Both fuse indexes 0x3A (odm_reserved + 0x0C) and 0x3C (odm_reserved + 0x0E) are used for anti-downgrade control. These fuses will have their values cached into [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]] and [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]].&lt;br /&gt;
&lt;br /&gt;
== Anti-downgrade ==&lt;br /&gt;
The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading.&lt;br /&gt;
How many fuses are expected to be burnt depends the device&#039;s unit type as below.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! System version&lt;br /&gt;
! Expected number of burnt fuses (retail)&lt;br /&gt;
! Expected number of burnt fuses (non-retail)&lt;br /&gt;
|-&lt;br /&gt;
| 1.0.0&lt;br /&gt;
| 1&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 2.0.0-2.3.0&lt;br /&gt;
| 2&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.0&lt;br /&gt;
| 3&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.1-3.0.2&lt;br /&gt;
| 4&lt;br /&gt;
| 1&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
If too many fuses are burnt the bootloader will panic immediately.&lt;br /&gt;
&lt;br /&gt;
If too few are burnt, the bootloader will enable fuse programming and write the expected value to fuse indexes 0x3A and 0x3C. Afterwards, fuse programming is disabled and a magic value (0x21 == TEGRA210) is written to PMC_SCRATCH200 register (0x7000EC40). Finally, the watchdog timer is initialized and programmed to force a reset.&lt;br /&gt;
&lt;br /&gt;
On a subsequent boot, after the anti-downgrade fuses are checked again, the PMC_RST_STATUS register (0x7000E5B4) is checked and if set to 0x01 (watchdog reset) the PMC_SCRATCH200 register (0x7000EC40) will be checked for the magic value (0x21 == TEGRA210).&lt;br /&gt;
PMC_RST_STATUS will only be set back to 0 (power on reset) if the fuse count matches the new expected value, otherwise the system will panic.&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2762</id>
		<title>Fuses</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Fuses&amp;diff=2762"/>
		<updated>2017-10-12T05:17:04Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The Nintendo Switch makes use of Tegra&#039;s fuse driver for a number of operations. This driver is mapped to physical address 0x7000F800 with a total size of 0x400 bytes and exposes several registers for fuse programming.&lt;br /&gt;
&lt;br /&gt;
Registers from 0x7000F800 to 0x7000F800 + 0xFF can be used to directly program the hardware fuse array, while registers from 0x7000F800 + 0x100 (FUSE_CHIP_REG_START_OFFSET) to 0x7000F800 + 0x3FC (FUSE_CHIP_REG_END_OFFSET) represent cached values read from certain fuses.&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
Below is a list of fuse driver registers used by the Switch&#039;s bootloaders.&lt;br /&gt;
&lt;br /&gt;
=== Driver registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_CTRL|FUSE_CTRL]]&lt;br /&gt;
| 0x7000F800&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_ADDR|FUSE_REG_ADDR]]&lt;br /&gt;
| 0x7000F804&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_READ|FUSE_REG_READ]]&lt;br /&gt;
| 0x7000F808&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_REG_WRITE|FUSE_REG_WRITE]]&lt;br /&gt;
| 0x7000F80C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD1&lt;br /&gt;
| 0x7000F810&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_RD2&lt;br /&gt;
| 0x7000F814&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TIME_PGM1&lt;br /&gt;
| 0x7000F818&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_TIME_PGM2|FUSE_TIME_PGM2]]&lt;br /&gt;
| 0x7000F81C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIV2INTFC&lt;br /&gt;
| 0x7000F820&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FUSEBYPASS&lt;br /&gt;
| 0x7000F824&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PRIVATEKEYDISABLE&lt;br /&gt;
| 0x7000F828&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_DIS_PGM|FUSE_DIS_PGM]]&lt;br /&gt;
| 0x7000F82C&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_WRITE_ACCESS|FUSE_WRITE_ACCESS]]&lt;br /&gt;
| 0x7000F830&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_PWR_GOOD_SW&lt;br /&gt;
| 0x7000F834&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_CTRL ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Fuse command (1 = FUSE_READ; 2 = FUSE_WRITE; 3 = FUSE_SENSE)&lt;br /&gt;
|-&lt;br /&gt;
| 26&lt;br /&gt;
| Fuse power down mode flag (FUSE_CTRL_PD)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Before fuse reading/writing the power down mode must be disabled.&lt;br /&gt;
FUSE_SENSE mode flushes programmed values into the [[Fuses#Cache_registers|cache registers]].&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_ADDR ====&lt;br /&gt;
This register takes the address of the fuse to be read/written/sensed.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_READ ====&lt;br /&gt;
This register receives the value read from the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_REG_WRITE ====&lt;br /&gt;
This register takes the value to be written to the fuse.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_TIME_PGM2 ====&lt;br /&gt;
This register takes the fuse programming pulse (0xC0 == 19200 kHz).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_DIS_PGM ====&lt;br /&gt;
If set to 0x01, this register disables fuse programming.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_WRITE_ACCESS ====&lt;br /&gt;
If set to 0x01, this register disables software writes to the fuse driver registers.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== Cache registers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Address&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SKU_INFO|FUSE_SKU_INFO]]&lt;br /&gt;
| 0x7000F910&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_0&lt;br /&gt;
| 0x7000F914&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_IDDQ&lt;br /&gt;
| 0x7000F918&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FT_REV&lt;br /&gt;
| 0x7000F928&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_1&lt;br /&gt;
| 0x7000F92C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CPU_SPEEDO_2&lt;br /&gt;
| 0x7000F930&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_0&lt;br /&gt;
| 0x7000F934&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SOC_SPEEDO_1|FUSE_SOC_SPEEDO_1]]&lt;br /&gt;
| 0x7000F938&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_SPEEDO_2&lt;br /&gt;
| 0x7000F93C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SOC_IDDQ&lt;br /&gt;
| 0x7000F940&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_FA|FUSE_FA]]&lt;br /&gt;
| 0x7000F948&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_2&lt;br /&gt;
| 0x7000F988&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_CP_REV&lt;br /&gt;
| 0x7000F990&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_0&lt;br /&gt;
| 0x7000F998&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FIRST_BOOTROM_PATCH_SIZE_REG&lt;br /&gt;
| 0x7000F99C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VP8_ENABLE&lt;br /&gt;
| 0x7000F9C4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM0&lt;br /&gt;
| 0x7000F9C8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM1&lt;br /&gt;
| 0x7000F9CC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM2&lt;br /&gt;
| 0x7000F9D0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM3&lt;br /&gt;
| 0x7000F9D4&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM4|FUSE_RESERVED_ODM4]]&lt;br /&gt;
| 0x7000F9D8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_ODM5&lt;br /&gt;
| 0x7000F9DC&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]]&lt;br /&gt;
| 0x7000F9E0&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]]&lt;br /&gt;
| 0x7000F9E4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_USB_CALIB&lt;br /&gt;
| 0x7000F9F0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SKU_DIRECT_CONFIG&lt;br /&gt;
| 0x7000F9F4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_VENDOR_CODE&lt;br /&gt;
| 0x7000FA00&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_FAB_CODE&lt;br /&gt;
| 0x7000FA04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_0&lt;br /&gt;
| 0x7000FA08&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_LOT_CODE_1&lt;br /&gt;
| 0x7000FA0C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_WAFER_ID&lt;br /&gt;
| 0x7000FA10&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_X_COORDINATE&lt;br /&gt;
| 0x7000FA14&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_Y_COORDINATE&lt;br /&gt;
| 0x7000FA18&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_GPU_IDDQ&lt;br /&gt;
| 0x7000FA28&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_3&lt;br /&gt;
| 0x7000FA2C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_SUBREVISION&lt;br /&gt;
| 0x7000FA48&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_4&lt;br /&gt;
| 0x7000FA54&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_5&lt;br /&gt;
| 0x7000FA58&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_6&lt;br /&gt;
| 0x7000FA5C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_7&lt;br /&gt;
| 0x7000FA60&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_OPT_PRIV_SEC_DIS&lt;br /&gt;
| 0x7000FA64&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_COMMON&lt;br /&gt;
| 0x7000FA80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_8&lt;br /&gt;
| 0x7000FAD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_RESERVED_CALIB&lt;br /&gt;
| 0x7000FB04&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_TSENSOR_9&lt;br /&gt;
| 0x7000FB1C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_USB_CALIB_EXT&lt;br /&gt;
| 0x7000FB50&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_0&lt;br /&gt;
| 0x7000FB80&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_1&lt;br /&gt;
| 0x7000FB84&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_2&lt;br /&gt;
| 0x7000FB88&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_3&lt;br /&gt;
| 0x7000FB8C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_4&lt;br /&gt;
| 0x7000FB90&lt;br /&gt;
|-&lt;br /&gt;
| [[#FUSE_SPARE_BIT_5|FUSE_SPARE_BIT_5]]&lt;br /&gt;
| 0x7000FB94&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_6&lt;br /&gt;
| 0x7000FB98&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_7&lt;br /&gt;
| 0x7000FB9C&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_8&lt;br /&gt;
| 0x7000FBA0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_9&lt;br /&gt;
| 0x7000FBA4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_10&lt;br /&gt;
| 0x7000FBA8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_11&lt;br /&gt;
| 0x7000FBAC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_12&lt;br /&gt;
| 0x7000FBB0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_13&lt;br /&gt;
| 0x7000FBB4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_14&lt;br /&gt;
| 0x7000FBB8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_15&lt;br /&gt;
| 0x7000FBBC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_16&lt;br /&gt;
| 0x7000FBC0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_17&lt;br /&gt;
| 0x7000FBC4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_18&lt;br /&gt;
| 0x7000FBC8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_19&lt;br /&gt;
| 0x7000FBCC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_20&lt;br /&gt;
| 0x7000FBD0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_21&lt;br /&gt;
| 0x7000FBD4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_22&lt;br /&gt;
| 0x7000FBD8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_23&lt;br /&gt;
| 0x7000FBDC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_24&lt;br /&gt;
| 0x7000FBE0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_25&lt;br /&gt;
| 0x7000FBE4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_26&lt;br /&gt;
| 0x7000FBE8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_27&lt;br /&gt;
| 0x7000FBEC&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_28&lt;br /&gt;
| 0x7000FBF0&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_29&lt;br /&gt;
| 0x7000FBF4&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_30&lt;br /&gt;
| 0x7000FBF8&lt;br /&gt;
|-&lt;br /&gt;
| FUSE_SPARE_BIT_31&lt;br /&gt;
| 0x7000FBFC&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SKU_INFO ====&lt;br /&gt;
Stores the SKU ID (must be 0x83).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_FA ====&lt;br /&gt;
Stores if in factory mode (0 = factory).&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SOC_SPEEDO_1 ====&lt;br /&gt;
Stores the bootrom patch version.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM4 ====&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Bits&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
| 0-1&lt;br /&gt;
| Unit type (3 = debug; 0 = retail)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| Unknown config (must be 1 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| Unknown config mask (must be 0 on retail)&lt;br /&gt;
|-&lt;br /&gt;
| 9&lt;br /&gt;
| Unit type mask (0 = debug; 1 = retail)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
This stores some device configuration parameters.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM6 ====&lt;br /&gt;
This register returns the value programmed into index 0x3A of the fuse array. &lt;br /&gt;
&lt;br /&gt;
==== FUSE_RESERVED_ODM7 ====&lt;br /&gt;
This register returns the value programmed into index 0x3C of the fuse array.&lt;br /&gt;
&lt;br /&gt;
==== FUSE_SPARE_BIT_5 ====&lt;br /&gt;
Must be non-zero on retail units, otherwise the first bootloader panics.&lt;br /&gt;
On debug units it can be zero, which tells the bootloader to choose from two debug master key seeds. If set to non-zero on a debug unit, it tells the bootloader to choose from two retail master key seeds (only the last one matches the retail master key seed).&lt;br /&gt;
&lt;br /&gt;
== eFuses ==&lt;br /&gt;
The actual hardware fuses can be programmed through the fuse driver after enabling fuse programming.&lt;br /&gt;
&lt;br /&gt;
Below is a list of common fuse indexes used by Tegra devices (and applicable to the Switch).&lt;br /&gt;
Note that the indexes are relative to the start of the fuse array and each element is a 4 byte word. A single fuse write operation always writes the same word at both fuse_array + 0 (PRIMARY_ALIAS) and fuse_array + 1 (REDUNDANT_ALIAS).&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
!  Name&lt;br /&gt;
!  Index&lt;br /&gt;
!  Bits&lt;br /&gt;
|-&lt;br /&gt;
| jtag_disable&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_production_mode&lt;br /&gt;
| 0x00&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| odm_lock&lt;br /&gt;
| 0x00&lt;br /&gt;
| 4&lt;br /&gt;
|-&lt;br /&gt;
| public_key&lt;br /&gt;
| 0x0C&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| secure_boot_key&lt;br /&gt;
| 0x22&lt;br /&gt;
| 128&lt;br /&gt;
|-&lt;br /&gt;
| device_key&lt;br /&gt;
| 0x2A&lt;br /&gt;
| 32&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_cfg&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 16&lt;br /&gt;
|-&lt;br /&gt;
| sec_boot_dev_sel&lt;br /&gt;
| 0x2C&lt;br /&gt;
| 3&lt;br /&gt;
|-&lt;br /&gt;
| sw_reserved&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 12&lt;br /&gt;
|-&lt;br /&gt;
| ignore_dev_sel_straps&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| [[#odm_reserved|odm_reserved]]&lt;br /&gt;
| 0x2E&lt;br /&gt;
| 256&lt;br /&gt;
|-&lt;br /&gt;
| pkc_disable&lt;br /&gt;
| 0x52&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== odm_reserved ===&lt;br /&gt;
The first bootloader only burns fuses in this region.&lt;br /&gt;
Both fuse indexes 0x3A (odm_reserved + 0x0C) and 0x3C (odm_reserved + 0x0E) are used for anti-downgrade control. These fuses will have their values cached into [[#FUSE_RESERVED_ODM6|FUSE_RESERVED_ODM6]] and [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]].&lt;br /&gt;
&lt;br /&gt;
== Anti-downgrade ==&lt;br /&gt;
The first bootloader verifies [[#FUSE_RESERVED_ODM7|FUSE_RESERVED_ODM7]] to prevent downgrading.&lt;br /&gt;
How many fuses are expected to be burnt depends the device&#039;s unit type as below.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! System version&lt;br /&gt;
! Expected number of burnt fuses (retail)&lt;br /&gt;
! Expected number of burnt fuses (non-retail)&lt;br /&gt;
|-&lt;br /&gt;
| 1.0.0&lt;br /&gt;
| 1&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 2.0.0-2.3.0&lt;br /&gt;
| 2&lt;br /&gt;
| 0&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.0&lt;br /&gt;
| 3&lt;br /&gt;
| 1&lt;br /&gt;
|-&lt;br /&gt;
| 3.0.1-3.0.2&lt;br /&gt;
| 4&lt;br /&gt;
| 1&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
If too many fuses are burnt the bootloader will panic immediately.&lt;br /&gt;
&lt;br /&gt;
If too few are burnt, the bootloader will enable fuse programming and write the expected value to fuse indexes 0x3A and 0x3C. Afterwards, fuse programming is disabled and a magic value (0x21 == TEGRA210) is written to PMC_SCRATCH200 register (0x7000EC40). Finally, the watchdog timer is initialized and programmed to force a reset.&lt;br /&gt;
&lt;br /&gt;
On a subsequent boot, after the anti-downgrade fuses are checked again, the PMC_RST_STATUS register (0x7000E5B4) is checked and if set to 0x01 (watchdog reset) the PMC_SCRATCH200 register (0x7000EC40) will be checked for the magic value (0x21 == TEGRA210).&lt;br /&gt;
PMC_RST_STATUS will only be set back to 0 (power on reset) if the fuse count matches the new expected value, otherwise the system will panic.&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=BCT&amp;diff=2313</id>
		<title>BCT</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=BCT&amp;diff=2313"/>
		<updated>2017-09-04T22:26:06Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;BCT (Boot Configuration Table) is a data structure present on Tegra based devices that supplies boot time configuration parameters.&lt;br /&gt;
&lt;br /&gt;
The Switch&#039;s BCT is included in the firmware package titles (0100000000000819 and 010000000000081A) and is installed into eMMC storage&#039;s [[Flash_Filesystem#Boot_Partitions|boot partition 0]]. A total of four BCT copies can be installed into the system: normal, normal backup, safe mode and safe mode backup.&lt;br /&gt;
&lt;br /&gt;
By design, the BCT&#039;s data is only signed after offset 0x0510. Therefore, regions like [[#customer_data|customer_data]] can be freely modified without resigning. This is done by [[NS_Services|NS]] when injecting a new [[Flash_Filesystem#Keyblob|keyblob]] during a system update, for example.&lt;br /&gt;
&lt;br /&gt;
During boot, the boot ROM parses the appropriate BCT from eMMC storage and stores a copy of it in IRAM at address 0x40000000.&lt;br /&gt;
&lt;br /&gt;
= Structure =&lt;br /&gt;
== NAND ==&lt;br /&gt;
Below is the BCT structure used by the Switch, which is a minimal variation of the Tegra 210 BCT format.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x0000&lt;br /&gt;
|  0x210&lt;br /&gt;
|  bad_block_table&lt;br /&gt;
|  Table containing information on bad blocks&lt;br /&gt;
 0x0000: num_entries (0x200)&lt;br /&gt;
 0x0004: virtual_block_size (0x0F)&lt;br /&gt;
 0x0005: block_size (0x0E)&lt;br /&gt;
 0x0006: bad_blocks&lt;br /&gt;
 0x0206: reserved&lt;br /&gt;
|-&lt;br /&gt;
|  0x0210&lt;br /&gt;
|  0x100&lt;br /&gt;
|  bct_key&lt;br /&gt;
|  BCT RSA key modulus&lt;br /&gt;
|-&lt;br /&gt;
|  0x0310&lt;br /&gt;
|  0x110&lt;br /&gt;
|  bct_signature&lt;br /&gt;
|  BCT object signature&lt;br /&gt;
 0x0310: hash (empty)&lt;br /&gt;
 0x0320: rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x0420&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_insecure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0424&lt;br /&gt;
|  0x20&lt;br /&gt;
|  sec_provisioning_key&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0444&lt;br /&gt;
|  0xC4&lt;br /&gt;
|  [[#customer_data|customer_data]]&lt;br /&gt;
|  Data block available for the customer. Used in key generation.&lt;br /&gt;
 0x0444: padding_0x0C&lt;br /&gt;
 0x0450: keyblob_0xB0&lt;br /&gt;
 0x0500: padding_0x08&lt;br /&gt;
|-&lt;br /&gt;
|  0x0508&lt;br /&gt;
|  0x04&lt;br /&gt;
|  odm_data&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x050C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  reserved0&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0510&lt;br /&gt;
|  0x10&lt;br /&gt;
|  random_aes_block&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0520&lt;br /&gt;
|  0x10&lt;br /&gt;
|  unique_chip_id&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0530&lt;br /&gt;
|  0x04&lt;br /&gt;
|  boot_data_version&lt;br /&gt;
|  Set to 0x00210001 (BOOTDATA_VERSION_T210).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0534&lt;br /&gt;
|  0x04&lt;br /&gt;
|  block_size_log2&lt;br /&gt;
|  Always 0x0E.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0538&lt;br /&gt;
|  0x04&lt;br /&gt;
|  page_size_log2&lt;br /&gt;
|  Always 0x09.&lt;br /&gt;
|-&lt;br /&gt;
|  0x053C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  partition_size&lt;br /&gt;
|  Always 0x01000000.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0540&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_param_sets&lt;br /&gt;
|  Number of device parameter sets. Always 0x01.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0544&lt;br /&gt;
|  0x04&lt;br /&gt;
|  dev_type&lt;br /&gt;
|  Device type. Set to 0x04 (dev_type_sdmmc).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0548&lt;br /&gt;
|  0x40&lt;br /&gt;
|  dev_params&lt;br /&gt;
| Device parameters&lt;br /&gt;
  0x0548: sdmmc_clock_divider (0x09 == 24MHz)&lt;br /&gt;
  0x054C: sdmmc_data_width (0x02 == sdmmc_data_width_8bit)&lt;br /&gt;
|-&lt;br /&gt;
|  0x0588&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_sdram_sets&lt;br /&gt;
|  Number of SDRAM parameter sets. Always set to 0 (parameters unused).&lt;br /&gt;
|-&lt;br /&gt;
|  0x058C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params0&lt;br /&gt;
|  Default values filled in, but not used&lt;br /&gt;
|-&lt;br /&gt;
|  0x0CF4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params1&lt;br /&gt;
|  Default values filled in, but not used&lt;br /&gt;
|-&lt;br /&gt;
|  0x145C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params2&lt;br /&gt;
|  Default values filled in, but not used&lt;br /&gt;
|-&lt;br /&gt;
|  0x1BC4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params3&lt;br /&gt;
|  Default values filled in, but not used&lt;br /&gt;
|-&lt;br /&gt;
|  0x232C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_bootloaders&lt;br /&gt;
|  Number of bootloaders installed. Always 0x02 (maximum is 0x04).&lt;br /&gt;
|-&lt;br /&gt;
|  0x2330&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  [[#bootloader0_info|bootloader0_info]]&lt;br /&gt;
|  Configuration parameters for bootloader 0 (normal).&lt;br /&gt;
 0x2330: version (variable)&lt;br /&gt;
 0x2334: start_block (0x00000040)&lt;br /&gt;
 0x2338: start_page (0x00000000)&lt;br /&gt;
 0x233C: length (variable)&lt;br /&gt;
 0x2340: load_addr (0x40010000)&lt;br /&gt;
 0x2344: entry_point (0x40010020)&lt;br /&gt;
 0x2348: attribute (0x00000000)&lt;br /&gt;
 0x234C: bootloader0_hash (empty)&lt;br /&gt;
 0x235C: bootloader0_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x245C&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  bootloader1_info&lt;br /&gt;
|  Configuration parameters for bootloader 1 (safe mode).&lt;br /&gt;
 0x245C: version (variable)&lt;br /&gt;
 0x2460: start_block (0x00000050)&lt;br /&gt;
 0x2464: start_page (0x00000000)&lt;br /&gt;
 0x2468: length (variable)&lt;br /&gt;
 0x246C: load_addr (0x40010000)&lt;br /&gt;
 0x2470: entry_point (0x40010020)&lt;br /&gt;
 0x2474: attribute (0x00000000)&lt;br /&gt;
 0x2478: bootloader1_hash (empty)&lt;br /&gt;
 0x2488: bootloader1_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x2588&lt;br /&gt;
|  0x258&lt;br /&gt;
|  reserved1&lt;br /&gt;
|  Reserved space for bootloaders 2 and 3 (currently unused).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E0&lt;br /&gt;
|  0x01&lt;br /&gt;
|  enable_fail_back&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E1&lt;br /&gt;
|  0x04&lt;br /&gt;
|  secure_debug_control&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E5&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_secure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E9&lt;br /&gt;
|  0x12&lt;br /&gt;
|  reserved2&lt;br /&gt;
|  Always starts with 0x80000000 (NVBOOT padding pattern).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27FB&lt;br /&gt;
|  0x05&lt;br /&gt;
|  padding&lt;br /&gt;
|  Empty. Not part of BCT data.&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== customer_data ===&lt;br /&gt;
This data block is ignored by the boot ROM, therefore is available for the programmer to use freely.&lt;br /&gt;
The Switch uses 0xB0 bytes of this area, at offset 0x0450, to store the active [[Flash_Filesystem#Keyblob|keyblob]]. All remaining bytes are zero.&lt;br /&gt;
&lt;br /&gt;
The first bootloader validates and decrypts this block for further key generation.&lt;br /&gt;
The decrypted keyblob payload is as follows.&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Offset&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0x0&lt;br /&gt;
| 0x80&lt;br /&gt;
| Array of master static key encryption keys&lt;br /&gt;
|-&lt;br /&gt;
| 0x80&lt;br /&gt;
| 0x10 &lt;br /&gt;
| [[Package1#Stage_1|Stage 1]] key&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== bootloader0_info ===&lt;br /&gt;
==== 1.0.0 - 2.3.0 ====&lt;br /&gt;
The version field is set to 0x01, meaning that the first keyblob is to be used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.0 ====&lt;br /&gt;
The version field was changed to 0x02, meaning that the second keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.1 ==== &lt;br /&gt;
The version field was changed to 0x03, meaning that the third keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
== IRAM ==&lt;br /&gt;
When copied to IRAM, the BCT has an additional header as follows.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x00&lt;br /&gt;
|  0x50&lt;br /&gt;
|  bct_global_header&lt;br /&gt;
|  Contains pointers to actual BCT data.&lt;br /&gt;
 0x4C: bct_data_addr (address of the actual BCT)&lt;br /&gt;
|-&lt;br /&gt;
|  0x50&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader0_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader0 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x68&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader1_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader1 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x80&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader2_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader2 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x98&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader3_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader3 is used) &lt;br /&gt;
|-&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=BCT&amp;diff=2312</id>
		<title>BCT</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=BCT&amp;diff=2312"/>
		<updated>2017-09-04T22:25:05Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;BCT (Boot Configuration Table) is a data structure present on Tegra based devices that supplies boot time configuration parameters.&lt;br /&gt;
&lt;br /&gt;
The Switch&#039;s BCT is included in the firmware package titles (0100000000000819 and 010000000000081A) and is installed into eMMC storage&#039;s [[Flash_Filesystem#Boot_Partitions|boot partition 0]]. A total of four BCT copies can be installed into the system: normal, normal backup, safe mode and safe mode backup.&lt;br /&gt;
&lt;br /&gt;
By design, the BCT&#039;s data is only signed after offset 0x0510. Therefore, regions like [[#customer_data|customer_data]] can be freely modified without resigning. This is done by [[NS_Services|NS]] when injecting a new [[Flash_Filesystem#Keyblob|keyblob]] during a system update, for example.&lt;br /&gt;
&lt;br /&gt;
During boot, the boot ROM parses the appropriate BCT from eMMC storage and stores a copy of it in IRAM at address 0x40000000.&lt;br /&gt;
&lt;br /&gt;
= Structure =&lt;br /&gt;
== NAND ==&lt;br /&gt;
Below is the BCT structure used by the Switch, which is a minimal variation of the Tegra 210 BCT format.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x0000&lt;br /&gt;
|  0x210&lt;br /&gt;
|  bad_block_table&lt;br /&gt;
|  Table containing information on bad blocks&lt;br /&gt;
 0x0000: num_entries (0x200)&lt;br /&gt;
 0x0004: virtual_block_size (0x0F)&lt;br /&gt;
 0x0005: block_size (0x0E)&lt;br /&gt;
 0x0006: bad_blocks&lt;br /&gt;
 0x0206: reserved&lt;br /&gt;
|-&lt;br /&gt;
|  0x0210&lt;br /&gt;
|  0x100&lt;br /&gt;
|  bct_key&lt;br /&gt;
|  BCT RSA key modulus&lt;br /&gt;
|-&lt;br /&gt;
|  0x0310&lt;br /&gt;
|  0x110&lt;br /&gt;
|  bct_signature&lt;br /&gt;
|  BCT object signature&lt;br /&gt;
 0x0310: hash (empty)&lt;br /&gt;
 0x0320: rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x0420&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_insecure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0424&lt;br /&gt;
|  0x20&lt;br /&gt;
|  sec_provisioning_key&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0444&lt;br /&gt;
|  0xC4&lt;br /&gt;
|  [[#customer_data|customer_data]]&lt;br /&gt;
|  Data block available for the customer. Used in key generation.&lt;br /&gt;
 0x0444: padding_0x0C&lt;br /&gt;
 0x0450: keyblob_0xB0&lt;br /&gt;
 0x0500: padding_0x08&lt;br /&gt;
|-&lt;br /&gt;
|  0x0508&lt;br /&gt;
|  0x04&lt;br /&gt;
|  odm_data&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x050C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  reserved0&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0510&lt;br /&gt;
|  0x10&lt;br /&gt;
|  random_aes_block&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0520&lt;br /&gt;
|  0x10&lt;br /&gt;
|  unique_chip_id&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0530&lt;br /&gt;
|  0x04&lt;br /&gt;
|  boot_data_version&lt;br /&gt;
|  Set to 0x00210001 (BOOTDATA_VERSION_T210).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0534&lt;br /&gt;
|  0x04&lt;br /&gt;
|  block_size_log2&lt;br /&gt;
|  Always 0x0E.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0538&lt;br /&gt;
|  0x04&lt;br /&gt;
|  page_size_log2&lt;br /&gt;
|  Always 0x09.&lt;br /&gt;
|-&lt;br /&gt;
|  0x053C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  partition_size&lt;br /&gt;
|  Always 0x01000000.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0540&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_param_sets&lt;br /&gt;
|  Number of device parameter sets. Always 0x01.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0544&lt;br /&gt;
|  0x04&lt;br /&gt;
|  dev_type&lt;br /&gt;
|  Device type. Set to 0x04 (dev_type_sdmmc).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0548&lt;br /&gt;
|  0x40&lt;br /&gt;
|  dev_params&lt;br /&gt;
| Device parameters&lt;br /&gt;
  0x0548: sdmmc_clock_divider (0x09 == 24MHz)&lt;br /&gt;
  0x054C: sdmmc_data_width (0x02 == sdmmc_data_width_8bit)&lt;br /&gt;
|-&lt;br /&gt;
|  0x0588&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_sdram_sets&lt;br /&gt;
|  Number of SDRAM parameter sets. Always set to 0 (parameters unused).&lt;br /&gt;
|-&lt;br /&gt;
|  0x058C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params0. Default values filled in, but not used&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x0CF4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params1. Default values filled in, but not used&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x145C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params2. Default values filled in, but not used&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x1BC4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params3. Default values filled in, but not used&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x232C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_bootloaders&lt;br /&gt;
|  Number of bootloaders installed. Always 0x02 (maximum is 0x04).&lt;br /&gt;
|-&lt;br /&gt;
|  0x2330&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  [[#bootloader0_info|bootloader0_info]]&lt;br /&gt;
|  Configuration parameters for bootloader 0 (normal).&lt;br /&gt;
 0x2330: version (variable)&lt;br /&gt;
 0x2334: start_block (0x00000040)&lt;br /&gt;
 0x2338: start_page (0x00000000)&lt;br /&gt;
 0x233C: length (variable)&lt;br /&gt;
 0x2340: load_addr (0x40010000)&lt;br /&gt;
 0x2344: entry_point (0x40010020)&lt;br /&gt;
 0x2348: attribute (0x00000000)&lt;br /&gt;
 0x234C: bootloader0_hash (empty)&lt;br /&gt;
 0x235C: bootloader0_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x245C&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  bootloader1_info&lt;br /&gt;
|  Configuration parameters for bootloader 1 (safe mode).&lt;br /&gt;
 0x245C: version (variable)&lt;br /&gt;
 0x2460: start_block (0x00000050)&lt;br /&gt;
 0x2464: start_page (0x00000000)&lt;br /&gt;
 0x2468: length (variable)&lt;br /&gt;
 0x246C: load_addr (0x40010000)&lt;br /&gt;
 0x2470: entry_point (0x40010020)&lt;br /&gt;
 0x2474: attribute (0x00000000)&lt;br /&gt;
 0x2478: bootloader1_hash (empty)&lt;br /&gt;
 0x2488: bootloader1_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x2588&lt;br /&gt;
|  0x258&lt;br /&gt;
|  reserved1&lt;br /&gt;
|  Reserved space for bootloaders 2 and 3 (currently unused).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E0&lt;br /&gt;
|  0x01&lt;br /&gt;
|  enable_fail_back&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E1&lt;br /&gt;
|  0x04&lt;br /&gt;
|  secure_debug_control&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E5&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_secure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E9&lt;br /&gt;
|  0x12&lt;br /&gt;
|  reserved2&lt;br /&gt;
|  Always starts with 0x80000000 (NVBOOT padding pattern).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27FB&lt;br /&gt;
|  0x05&lt;br /&gt;
|  padding&lt;br /&gt;
|  Empty. Not part of BCT data.&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== customer_data ===&lt;br /&gt;
This data block is ignored by the boot ROM, therefore is available for the programmer to use freely.&lt;br /&gt;
The Switch uses 0xB0 bytes of this area, at offset 0x0450, to store the active [[Flash_Filesystem#Keyblob|keyblob]]. All remaining bytes are zero.&lt;br /&gt;
&lt;br /&gt;
The first bootloader validates and decrypts this block for further key generation.&lt;br /&gt;
The decrypted keyblob payload is as follows.&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Offset&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0x0&lt;br /&gt;
| 0x80&lt;br /&gt;
| Array of master static key encryption keys&lt;br /&gt;
|-&lt;br /&gt;
| 0x80&lt;br /&gt;
| 0x10 &lt;br /&gt;
| [[Package1#Stage_1|Stage 1]] key&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== bootloader0_info ===&lt;br /&gt;
==== 1.0.0 - 2.3.0 ====&lt;br /&gt;
The version field is set to 0x01, meaning that the first keyblob is to be used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.0 ====&lt;br /&gt;
The version field was changed to 0x02, meaning that the second keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.1 ==== &lt;br /&gt;
The version field was changed to 0x03, meaning that the third keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
== IRAM ==&lt;br /&gt;
When copied to IRAM, the BCT has an additional header as follows.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x00&lt;br /&gt;
|  0x50&lt;br /&gt;
|  bct_global_header&lt;br /&gt;
|  Contains pointers to actual BCT data.&lt;br /&gt;
 0x4C: bct_data_addr (address of the actual BCT)&lt;br /&gt;
|-&lt;br /&gt;
|  0x50&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader0_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader0 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x68&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader1_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader1 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x80&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader2_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader2 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x98&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader3_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader3 is used) &lt;br /&gt;
|-&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=BCT&amp;diff=2311</id>
		<title>BCT</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=BCT&amp;diff=2311"/>
		<updated>2017-09-04T22:16:05Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;BCT (Boot Configuration Table) is a data structure present on Tegra based devices that supplies boot time configuration parameters.&lt;br /&gt;
&lt;br /&gt;
The Switch&#039;s BCT is included in the firmware package titles (0100000000000819 and 010000000000081A) and is installed into eMMC storage&#039;s [[Flash_Filesystem#Boot_Partitions|boot partition 0]]. A total of four BCT copies can be installed into the system: normal, normal backup, safe mode and safe mode backup.&lt;br /&gt;
&lt;br /&gt;
By design, the BCT&#039;s data is only signed after offset 0x0510. Therefore, regions like [[#customer_data|customer_data]] can be freely modified without resigning. This is done by [[NS_Services|NS]] when injecting a new [[Flash_Filesystem#Keyblob|keyblob]] during a system update, for example.&lt;br /&gt;
&lt;br /&gt;
During boot, the boot ROM parses the appropriate BCT from eMMC storage and stores a copy of it in IRAM at address 0x40000000.&lt;br /&gt;
&lt;br /&gt;
= Structure =&lt;br /&gt;
== NAND ==&lt;br /&gt;
Below is the BCT structure used by the Switch, which is a minimal variation of the Tegra 210 BCT format.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x0000&lt;br /&gt;
|  0x210&lt;br /&gt;
|  bad_block_table&lt;br /&gt;
|  Table containing information on bad blocks&lt;br /&gt;
 0x0000: num_entries (0x200)&lt;br /&gt;
 0x0004: virtual_block_size (0x0F)&lt;br /&gt;
 0x0005: block_size (0x0E)&lt;br /&gt;
 0x0006: bad_blocks&lt;br /&gt;
 0x0206: reserved&lt;br /&gt;
|-&lt;br /&gt;
|  0x0210&lt;br /&gt;
|  0x100&lt;br /&gt;
|  bct_key&lt;br /&gt;
|  BCT RSA key modulus&lt;br /&gt;
|-&lt;br /&gt;
|  0x0310&lt;br /&gt;
|  0x110&lt;br /&gt;
|  bct_signature&lt;br /&gt;
|  BCT object signature&lt;br /&gt;
 0x0310: hash (empty)&lt;br /&gt;
 0x0320: rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x0420&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_insecure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0424&lt;br /&gt;
|  0x20&lt;br /&gt;
|  sec_provisioning_key&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0444&lt;br /&gt;
|  0xC4&lt;br /&gt;
|  [[#customer_data|customer_data]]&lt;br /&gt;
|  Data block available for the customer. Used in key generation.&lt;br /&gt;
 0x0444: padding_0x0C&lt;br /&gt;
 0x0450: keyblob_0xB0&lt;br /&gt;
 0x0500: padding_0x08&lt;br /&gt;
|-&lt;br /&gt;
|  0x0508&lt;br /&gt;
|  0x04&lt;br /&gt;
|  odm_data&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x050C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  reserved0&lt;br /&gt;
|  Legacy field. Unused.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0510&lt;br /&gt;
|  0x10&lt;br /&gt;
|  random_aes_block&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0520&lt;br /&gt;
|  0x10&lt;br /&gt;
|  unique_chip_id&lt;br /&gt;
|  Always empty.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0530&lt;br /&gt;
|  0x04&lt;br /&gt;
|  boot_data_version&lt;br /&gt;
|  Set to 0x00210001 (BOOTDATA_VERSION_T210).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0534&lt;br /&gt;
|  0x04&lt;br /&gt;
|  block_size_log2&lt;br /&gt;
|  Always 0x0E.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0538&lt;br /&gt;
|  0x04&lt;br /&gt;
|  page_size_log2&lt;br /&gt;
|  Always 0x09.&lt;br /&gt;
|-&lt;br /&gt;
|  0x053C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  partition_size&lt;br /&gt;
|  Always 0x01000000.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0540&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_param_sets&lt;br /&gt;
|  Number of device parameter sets. Always 0x01.&lt;br /&gt;
|-&lt;br /&gt;
|  0x0544&lt;br /&gt;
|  0x04&lt;br /&gt;
|  dev_type&lt;br /&gt;
|  Device type. Set to 0x04 (dev_type_sdmmc).&lt;br /&gt;
|-&lt;br /&gt;
|  0x0548&lt;br /&gt;
|  0x40&lt;br /&gt;
|  dev_params&lt;br /&gt;
| Device parameters&lt;br /&gt;
  0x0548: sdmmc_clock_divider (0x09 == 24MHz)&lt;br /&gt;
  0x054C: sdmmc_data_width (0x02 == sdmmc_data_width_8bit)&lt;br /&gt;
|-&lt;br /&gt;
|  0x0588&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_sdram_sets&lt;br /&gt;
|  Number of SDRAM parameter sets. Set to 0?&lt;br /&gt;
|-&lt;br /&gt;
|  0x058C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params0&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x0CF4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params1&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x145C&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params2&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x1BC4&lt;br /&gt;
|  0x768&lt;br /&gt;
|  sdram_params3&lt;br /&gt;
|  &lt;br /&gt;
|-&lt;br /&gt;
|  0x232C&lt;br /&gt;
|  0x04&lt;br /&gt;
|  num_bootloaders&lt;br /&gt;
|  Number of bootloaders installed. Always 0x02 (maximum is 0x04).&lt;br /&gt;
|-&lt;br /&gt;
|  0x2330&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  [[#bootloader0_info|bootloader0_info]]&lt;br /&gt;
|  Configuration parameters for bootloader 0 (normal).&lt;br /&gt;
 0x2330: version (variable)&lt;br /&gt;
 0x2334: start_block (0x00000040)&lt;br /&gt;
 0x2338: start_page (0x00000000)&lt;br /&gt;
 0x233C: length (variable)&lt;br /&gt;
 0x2340: load_addr (0x40010000)&lt;br /&gt;
 0x2344: entry_point (0x40010020)&lt;br /&gt;
 0x2348: attribute (0x00000000)&lt;br /&gt;
 0x234C: bootloader0_hash (empty)&lt;br /&gt;
 0x235C: bootloader0_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x245C&lt;br /&gt;
|  0x12C&lt;br /&gt;
|  bootloader1_info&lt;br /&gt;
|  Configuration parameters for bootloader 1 (safe mode).&lt;br /&gt;
 0x245C: version (variable)&lt;br /&gt;
 0x2460: start_block (0x00000050)&lt;br /&gt;
 0x2464: start_page (0x00000000)&lt;br /&gt;
 0x2468: length (variable)&lt;br /&gt;
 0x246C: load_addr (0x40010000)&lt;br /&gt;
 0x2470: entry_point (0x40010020)&lt;br /&gt;
 0x2474: attribute (0x00000000)&lt;br /&gt;
 0x2478: bootloader1_hash (empty)&lt;br /&gt;
 0x2488: bootloader1_rsa_pss_signature&lt;br /&gt;
|-&lt;br /&gt;
|  0x2588&lt;br /&gt;
|  0x258&lt;br /&gt;
|  reserved1&lt;br /&gt;
|  Reserved space for bootloaders 2 and 3 (currently unused).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E0&lt;br /&gt;
|  0x01&lt;br /&gt;
|  enable_fail_back&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E1&lt;br /&gt;
|  0x04&lt;br /&gt;
|  secure_debug_control&lt;br /&gt;
|  Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E5&lt;br /&gt;
|  0x04&lt;br /&gt;
|  sec_provisioning_key_num_secure&lt;br /&gt;
|  Used for Factory Secure Provisioning. Always 0.&lt;br /&gt;
|-&lt;br /&gt;
|  0x27E9&lt;br /&gt;
|  0x12&lt;br /&gt;
|  reserved2&lt;br /&gt;
|  Always starts with 0x80000000 (NVBOOT padding pattern).&lt;br /&gt;
|-&lt;br /&gt;
|  0x27FB&lt;br /&gt;
|  0x05&lt;br /&gt;
|  padding&lt;br /&gt;
|  Empty. Not part of BCT data.&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== customer_data ===&lt;br /&gt;
This data block is ignored by the boot ROM, therefore is available for the programmer to use freely.&lt;br /&gt;
The Switch uses 0xB0 bytes of this area, at offset 0x0450, to store the active [[Flash_Filesystem#Keyblob|keyblob]]. All remaining bytes are zero.&lt;br /&gt;
&lt;br /&gt;
The first bootloader validates and decrypts this block for further key generation.&lt;br /&gt;
The decrypted keyblob payload is as follows.&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Offset&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0x0&lt;br /&gt;
| 0x80&lt;br /&gt;
| Array of master static key encryption keys&lt;br /&gt;
|-&lt;br /&gt;
| 0x80&lt;br /&gt;
| 0x10 &lt;br /&gt;
| [[Package1#Stage_1|Stage 1]] key&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== bootloader0_info ===&lt;br /&gt;
==== 1.0.0 - 2.3.0 ====&lt;br /&gt;
The version field is set to 0x01, meaning that the first keyblob is to be used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.0 ====&lt;br /&gt;
The version field was changed to 0x02, meaning that the second keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
==== 3.0.1 ==== &lt;br /&gt;
The version field was changed to 0x03, meaning that the third keyblob is now used.&lt;br /&gt;
&lt;br /&gt;
== IRAM ==&lt;br /&gt;
When copied to IRAM, the BCT has an additional header as follows.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
!  Offset&lt;br /&gt;
!  Size&lt;br /&gt;
!  Field&lt;br /&gt;
!  Description&lt;br /&gt;
|-&lt;br /&gt;
|  0x00&lt;br /&gt;
|  0x50&lt;br /&gt;
|  bct_global_header&lt;br /&gt;
|  Contains pointers to actual BCT data.&lt;br /&gt;
 0x4C: bct_data_addr (address of the actual BCT)&lt;br /&gt;
|-&lt;br /&gt;
|  0x50&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader0_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader0 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x68&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader1_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader1 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x80&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader2_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader2 is used) &lt;br /&gt;
|-&lt;br /&gt;
|  0x98&lt;br /&gt;
|  0x18&lt;br /&gt;
|  bootloader3_header&lt;br /&gt;
|  Unknown structure.&lt;br /&gt;
 0x00: is_active (if set to 0x01, bootloader3 is used) &lt;br /&gt;
|-&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1937</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1937"/>
		<updated>2017-08-06T01:14:49Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode1 with HOST-RANDOM &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted crypto mode1 command, reads CART-RANDOM&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted mode1 command, enters crypto mode2 with (HOST-RANDOM, CART-RANDOM)&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions can be dumped using the plaintext 5B commands&lt;br /&gt;
* The &amp;quot;secure&amp;quot; partition can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
There appear to be 2 kinds of crypto mode. &lt;br /&gt;
&lt;br /&gt;
Crypto mode1 is initiated solely by the HOST-RANDOM as random session seed. In that mode, the Switch host requests for the game cartridge random seed, and then sends a command to enter crypto mode2.&lt;br /&gt;
&lt;br /&gt;
Crypto mode2 takes into account the CART-RANDOM seed generated by the cartridge, and possibly the previous HOST-RANDOM.&lt;br /&gt;
The game cartridge will always send a different CART-RANDOM even if the exact same command sequence is replayed and thus with this scheme replay attacks are not possible.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1936</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1936"/>
		<updated>2017-08-06T01:13:49Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode1 with HOST-RANDOM &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted crypto mode1 command, reads CART-RANDOM&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted mode1 command, enters crypto mode2 with (HOST-RANDOM, CART-RANDOM)&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions can be dumped using the plaintext 5B commands&lt;br /&gt;
* The &amp;quot;secure&amp;quot; partition can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
There appear to be 2 kinds of crypto mode. &lt;br /&gt;
&lt;br /&gt;
Crypto mode1 is initiated solely by the HOST-RANDOM as random session seed. In that mode, the Switch host requests for the game cartridge random seed, and then sends a command to enter crypto mode2.&lt;br /&gt;
&lt;br /&gt;
Crypto mode2 takes into account the CART-RANDOM seed generated by the cartridge, and possibly the previous HOST-RANDOM.&lt;br /&gt;
The game cartridge will send a different random seed even if the exact same command sequence has been replayed and thus with this scheme replay attacks are not possible.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1935</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1935"/>
		<updated>2017-08-06T01:07:41Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode1 with HOST-RANDOM &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted crypto mode1 command, reads CART-RANDOM&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted mode1 command, enters crypto mode2 with (HOST-RANDOM, CART-RANDOM)&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted mode2 command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions can be dumped using the plaintext 5B commands&lt;br /&gt;
* The &amp;quot;secure&amp;quot; partition can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
There appear to be 2 kinds of crypto mode. &lt;br /&gt;
&lt;br /&gt;
Crypto mode1 is initiated solely by the HOST-RANDOM as random session seed. In that mode, the Switch host requests for the game cartridge random seed, and then sends a command to enter crypto mode2.&lt;br /&gt;
&lt;br /&gt;
Crypto mode2 takes into account the CART-RANDOM seed generated by the cartridge, and possibly the previous HOST-RANDOM.&lt;br /&gt;
With this scheme replay attacks are not possible when crypto mode2 has been entered.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1934</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1934"/>
		<updated>2017-08-05T21:12:46Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions can be dumped using the plaintext 5B commands&lt;br /&gt;
* The &amp;quot;secure&amp;quot; partition can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1933</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1933"/>
		<updated>2017-08-05T21:04:40Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The entire game cartridge contents can be dumped using the plaintext 5B commands (including &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions) except for the &amp;quot;secure&amp;quot; partition which can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1932</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1932"/>
		<updated>2017-08-05T21:03:30Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Observations ==&lt;br /&gt;
* The entire game cartridge can be dumped using the plaintext 5B commands (including &amp;quot;update&amp;quot; and &amp;quot;normal&amp;quot; partitions) except for the &amp;quot;secure&amp;quot; partition which can only be read from encrypted mode.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1905</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1905"/>
		<updated>2017-08-03T21:47:04Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock another cycle and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;01&amp;quot;. Otherwise it will respond with &amp;quot;00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will then keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual data response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1904</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1904"/>
		<updated>2017-08-03T21:33:41Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock 2 more cycles and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;00 01&amp;quot;. Otherwise it will respond with &amp;quot;00 00&amp;quot; and pull DAT0 low on the next cycle to signal it is busy. The Switch host will keep clocking until the cartridge is ready.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1903</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1903"/>
		<updated>2017-08-03T21:30:40Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the Switch stops driving the data bus, and the bus will be &#039;floating&#039;. Due to the pull-ups on the bus, it will slowly converge to logic HIGH state. The Switch will clock 2 cycles to allow the bus to settle a direction change. The Switch host will then clock 2 more cycles and if the game cartridge didn&#039;t receive the CRC OK, it will respond with &amp;quot;00 01&amp;quot;. Otherwise it will respond with &amp;quot;00 00&amp;quot;. After this the Switch will keep clocking and the cartridge will respond with a busy signal by pulling DAT0 low.&lt;br /&gt;
&lt;br /&gt;
When the game cartridge is ready to send the actual data response, it will pull the DAT0 pin high for 2 cycles to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1885</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1885"/>
		<updated>2017-08-02T23:07:01Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge (in this case, the game &amp;quot;1,2 Switch&amp;quot;) looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
The following examples are extracted from the game &amp;quot;1,2 Switch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== HEAD blob ===&lt;br /&gt;
 00000000: 6c dc 15 86 fa 88 11 f6 2f 4c b0 b8 3d 3f e9 63  l......./L..=?.c&lt;br /&gt;
 00000010: e9 5d b7 41 80 d5 1d e4 99 fa 5b 17 8a f1 91 e4  .].A......[.....&lt;br /&gt;
 00000020: d0 4c de 68 c5 d7 57 64 b5 91 fd 68 36 f3 fe ce  .L.h..Wd...h6...&lt;br /&gt;
 00000030: c9 d1 fa 8e 9d ce 94 c2 55 a3 7a 60 f9 80 85 a8  ........U.z`....&lt;br /&gt;
 00000040: 44 18 a9 b3 29 20 42 8d 5f 7a 2f ae 50 81 46 9c  D...) B._z/.P.F.&lt;br /&gt;
 00000050: 81 a1 a0 e2 89 3a 46 37 19 c1 c6 11 07 f9 f8 74  .....:F7.......t&lt;br /&gt;
 00000060: 89 98 d0 96 8e 44 10 f7 ac 62 f6 4a 50 b9 3d dc  .....D...b.JP.=.&lt;br /&gt;
 00000070: c9 cd 62 20 df 44 c7 41 d1 50 49 3c 06 38 dd 52  ..b .D.A.PI&amp;lt;.8.R&lt;br /&gt;
 00000080: f2 84 bb 9f 63 e7 64 4f b9 db 7f a2 47 e2 2f 3c  ....c.dO....G./&amp;lt;&lt;br /&gt;
 00000090: ba 52 27 92 6d 17 e4 25 a6 90 99 d6 88 66 3a c1  .R&#039;.m..%.....f:.&lt;br /&gt;
 000000a0: 52 54 6a c6 79 09 42 3c 3f 9e 33 32 f4 c6 eb 7d  RTj.y.B&amp;lt;?.32...}&lt;br /&gt;
 000000b0: 60 e5 f9 44 8b 6e ff 43 a6 13 6c 29 8e bd c8 6b  `..D.n.C..l)...k&lt;br /&gt;
 000000c0: 64 39 2d d5 f3 9a 4b 04 89 dc ac 0b b4 22 35 9f  d9-...K......&amp;quot;5.&lt;br /&gt;
 000000d0: df 74 2f f0 fb 6d a6 a4 56 ff 92 88 72 42 72 ea  .t/..m..V...rBr.&lt;br /&gt;
 000000e0: de f8 37 0e 46 77 04 05 43 df 59 2f 92 d1 3c 38  ..7.Fw..C.Y/..&amp;lt;8&lt;br /&gt;
 000000f0: 73 c8 64 e5 ea 2b 96 56 85 d2 9d a6 3a c4 46 1a  s.d..+.V....:.F.&lt;br /&gt;
 00000100: 48 45 41 44 40 02 0c 00 ff ff ff ff 00 f8 00 00  HEAD@...........&lt;br /&gt;
 00000110: 44 6c dd 95 4e c0 45 02 f1 27 38 00 00 00 00 00  Dl..N.E..&#039;8.....&lt;br /&gt;
 00000120: 08 5a 9c f5 ab 2a 9d f5 da 96 ab 8e 7a e9 11 68  .Z...*......z..h&lt;br /&gt;
 00000130: 00 f0 00 00 00 00 00 00 00 02 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 11 f7 72 54 a1 85 c0 cf 14 e9 99 f0 6a 1f c0 61  ..rT........j..a&lt;br /&gt;
 00000150: 05 74 33 f0 50 3e ee 78 68 7e f5 ef 33 da f1 1f  .t3.P&amp;gt;.xh~..3...&lt;br /&gt;
 00000160: 88 7f 7c a9 85 bd 0f 4e 2f fe cd 1f f4 26 74 29  ..|....N/....&amp;amp;t)&lt;br /&gt;
 00000170: 49 9d e5 d6 df c4 75 03 b9 9a b9 c7 8f 37 5c 88  I.....u......7\.&lt;br /&gt;
 00000180: 01 00 00 00 02 00 00 00 00 00 00 00 40 02 0c 00  ............@...&lt;br /&gt;
 00000190: ea a4 81 b6 30 4b 45 0c 71 5f a3 0c 5f 88 1f 9a  ....0KE.q_.._...&lt;br /&gt;
 000001a0: 67 9a e6 29 15 50 1a 46 98 a5 a1 af b1 07 ed 48  g..).P.F.......H&lt;br /&gt;
 000001b0: df a8 36 bb cd 2d d7 ba f5 c6 80 0a 03 ff 1f 73  ..6..-.........s&lt;br /&gt;
 000001c0: 2c bd 18 38 a0 49 24 c7 49 d1 94 52 ef 6a 7c 23  ,..8.I$.I..R.j|#&lt;br /&gt;
 000001d0: eb ca a4 35 52 59 e6 d3 98 ed b7 ec 11 cf 0b 1d  ...5RY..........&lt;br /&gt;
 000001e0: 29 f1 1d 43 e8 e0 2e 0f db 98 1a 88 47 fa 11 79  )..C........G..y&lt;br /&gt;
 000001f0: a8 ef 47 21 a1 bb de a6 dd b4 d6 27 8f 25 62 e4  ..G!.......&#039;.%b.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== CERT blob ===&lt;br /&gt;
 00000000: 72 cf 8c ed ce ed 43 fb 82 77 2c 86 2e da 1d 07  r.....C..w,.....&lt;br /&gt;
 00000010: 13 68 2e 1a fe 15 ac 6e 27 21 ec 3a 0f e9 fa 20  .h.....n&#039;!.:...&lt;br /&gt;
 00000020: 7b 70 62 a4 c3 47 65 86 ca 73 08 f0 71 80 17 59  {pb..Ge..s..q..Y&lt;br /&gt;
 00000030: 6a c8 2e e9 42 f8 69 12 7c 9d 5d 02 24 6b 2b 5e  j...B.i.|.].$k+^&lt;br /&gt;
 00000040: c4 d2 c8 80 11 47 a2 5e 41 b3 a9 41 95 91 bd 8f  .....G.^A..A....&lt;br /&gt;
 00000050: 6b c1 f5 0b 9b 37 06 6b ea 8e cd e9 eb 1d 8e c7  k....7.k........&lt;br /&gt;
 00000060: 3e 83 f1 85 8b 85 c6 af bf 38 c1 0a 7c c0 d1 42  &amp;gt;........8..|..B&lt;br /&gt;
 00000070: 0c 0c 7c 22 cd 0f a3 8c ee 48 e5 32 9f 68 1c e5  ..|&amp;quot;.....H.2.h..&lt;br /&gt;
 00000080: 13 4b d7 94 a1 c8 18 d0 1f 11 de 35 1e 34 a7 d1  .K.........5.4..&lt;br /&gt;
 00000090: 32 d8 d8 66 8b b1 db 1a 5b b6 1f fd 9a c9 a4 4b  2..f....[......K&lt;br /&gt;
 000000a0: 66 61 d9 52 5c f1 3c 8d de 25 f1 76 06 1b f2 37  fa.R\.&amp;lt;..%.v...7&lt;br /&gt;
 000000b0: a7 fb 1c f5 b8 20 67 ff 79 f2 a4 ab 8a 82 c4 97  ..... g.y.......&lt;br /&gt;
 000000c0: 9d 4c 01 e7 18 1f 91 60 f7 b8 68 da 73 b3 fa 47  .L.....`..h.s..G&lt;br /&gt;
 000000d0: 18 8f e8 ca e9 4b 08 1b 13 3e 17 e2 63 99 95 2f  .....K...&amp;gt;..c../&lt;br /&gt;
 000000e0: e6 d1 98 dc 50 77 7c 8a 25 eb 9e 34 0d e5 f1 93  ....Pw|.%..4....&lt;br /&gt;
 000000f0: b2 32 c5 da a1 ff 53 12 fb 5d bd 1f 67 6e 94 84  .2....S..]..gn..&lt;br /&gt;
 00000100: 43 45 52 54 00 00 00 00 00 00 00 00 00 00 00 00  CERT............&lt;br /&gt;
 00000110: 87 cd 3f 5c 04 49 6a 02 5f b1 7a 6a 13 d1 88 8f  ..?\.Ij._.zj....&lt;br /&gt;
 00000120: 00 10 00 00 00 00 00 00 00 00 09 52 b7 d5 d2 30  ...........R...0&lt;br /&gt;
 00000130: a3 13 4d 94 4b 0f 87 fe 2b da 37 ef 2d 38 25 75  ..M.K...+.7.-8%u&lt;br /&gt;
 00000140: d6 3e 94 7c 2a a0 f6 8a a3 60 40 18 5f 53 54 53  .&amp;gt;.|*....`@._STS&lt;br /&gt;
 00000150: fc 0f 1c 2d 10 92 f8 b6 d2 f2 97 df b2 13 2a 14  ...-..........*.&lt;br /&gt;
 00000160: ea c4 b1 9f 9c f4 b8 2f ef 5b 4f e3 8e d9 47 d7  ......./.[O...G.&lt;br /&gt;
 00000170: 2c 15 95 68 7e f4 e0 71 99 83 17 0c e1 fe 84 b5  ,..h~..q........&lt;br /&gt;
 00000180: a1 30 4c 33 c6 2c 13 fa 19 4d 37 48 e9 4e 3b a6  .0L3.,...M7H.N;.&lt;br /&gt;
 00000190: fa 0a 1e 13 46 f1 bf 15 88 5d 59 65 f7 a4 ad ba  ....F....]Ye....&lt;br /&gt;
 000001a0: d6 12 ce c2 33 b8 c3 c9 8f d3 34 c6 a5 6d 52 ff  ....3.....4..mR.&lt;br /&gt;
 000001b0: d9 55 96 5f cd 59 d5 0d 84 ff 83 7d f0 33 d8 32  .U._.Y.....}.3.2&lt;br /&gt;
 000001c0: ed 35 48 62 3a 68 2f 1e bf 22 1c fb cd e5 d9 b8  .5Hb:h/..&amp;quot;......&lt;br /&gt;
 000001d0: fc 24 e1 58 5d b3 4d 69 60 ab 8d 0e 17 28 24 43  .$.X].Mi`....($C&lt;br /&gt;
 000001e0: b7 a6 43 99 03 3c 1a 92 09 6b 8c 6f 09 37 6a 50  ..C..&amp;lt;...k.o.7jP&lt;br /&gt;
 000001f0: 46 91 d1 bf 7d 7a 32 a9 70 28 f1 5e 31 97 ac be  F...}z2.p(.^1...&lt;br /&gt;
&lt;br /&gt;
=== Crypto-challenge header ===&lt;br /&gt;
 00000000: 44 6c dd 95 4e c0 45 02 00 00 00 00 00 00 00 00  Dl..N.E.........&lt;br /&gt;
 00000010: a0 27 b4 2d 32 91 a0 8f 06 10 cb b0 ff d1 1b b3  .&#039;.-2...........&lt;br /&gt;
 00000020: aa 8a 9e 34 05 e0 81 42 4a 50 88 fc 5c 06 c6 c4  ...4...BJP..\...&lt;br /&gt;
 00000030: 5c 54 10 ee 66 07 0c a5 04 9f ef 9a 00 00 00 00  \T..f...........&lt;br /&gt;
 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;br /&gt;
 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1884</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1884"/>
		<updated>2017-08-02T23:00:10Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: LGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1883</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1883"/>
		<updated>2017-08-02T22:52:56Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Size&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x200&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x40&lt;br /&gt;
| Encrypted command, possibly read UID?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x0&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command, possibly read card id?&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| 0x4&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: BGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1882</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1882"/>
		<updated>2017-08-02T22:48:46Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|  style=&amp;quot;float:right; margin-left: 0px;&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
| [[File:ZeldaFront.jpg|200px|thumb|right|A Switch game cartridge, frontside]] &lt;br /&gt;
| [[File:ZeldaBack.jpg|200px|thumb|right|A Switch game cartridge, backside]] &lt;br /&gt;
|-&lt;br /&gt;
| [[File:CartridgeFront.jpeg|200px|thumb|right|Close-up of frontside PCB]]&lt;br /&gt;
|rowspan=&amp;quot;2&amp;quot;|[[File:CartridgeBack.jpeg|200px|thumb|right|Close-up of backside PCB]]&lt;br /&gt;
|-&lt;br /&gt;
|[[File:CartridgeFrontBare.jpeg|200px|thumb|right|Close-up of stripped frontside PCB]]&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Pinout ==&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
== Commands ==&lt;br /&gt;
&lt;br /&gt;
A typical boot up sequence of a game cartridge looks like this:&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Encryption ==&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
== Manufacturers ==&lt;br /&gt;
&lt;br /&gt;
;Macronix (MX)&lt;br /&gt;
: Uses package: BGA&lt;br /&gt;
: Uses card id: 0xC2&lt;br /&gt;
;OKI Semiconductor &lt;br /&gt;
: Uses package: TSOP-48&lt;br /&gt;
: Uses card id: 0xAE&lt;br /&gt;
;SanDisk?&lt;br /&gt;
: Uses package: ??&lt;br /&gt;
: Uses card id: 0x45 ?&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=File:Package_rearb.jpg&amp;diff=1880</id>
		<title>File:Package rearb.jpg</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=File:Package_rearb.jpg&amp;diff=1880"/>
		<updated>2017-08-02T22:32:36Z</updated>

		<summary type="html">&lt;p&gt;$andeor: $andeor moved page File:Package rearb.jpg to File:ZeldaBack.jpg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;#REDIRECT [[File:ZeldaBack.jpg]]&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=File:ZeldaBack.jpg&amp;diff=1879</id>
		<title>File:ZeldaBack.jpg</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=File:ZeldaBack.jpg&amp;diff=1879"/>
		<updated>2017-08-02T22:32:36Z</updated>

		<summary type="html">&lt;p&gt;$andeor: $andeor moved page File:Package rearb.jpg to File:ZeldaBack.jpg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=File:ZeldaBack.jpg&amp;diff=1878</id>
		<title>File:ZeldaBack.jpg</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=File:ZeldaBack.jpg&amp;diff=1878"/>
		<updated>2017-08-02T22:32:13Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=File:ZeldaFront.jpg&amp;diff=1877</id>
		<title>File:ZeldaFront.jpg</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=File:ZeldaFront.jpg&amp;diff=1877"/>
		<updated>2017-08-02T22:32:00Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1876</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1876"/>
		<updated>2017-08-02T22:21:07Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
===== Pinout =====&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
===== Protocol =====&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
===== Commands =====&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0, contains &amp;quot;HEAD&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;00 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read card id &amp;quot;AE F8 01 21&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;02 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read sector 0x38, contains &amp;quot;CERT&amp;quot; blob&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read ??? &amp;quot;01 00 00 00&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| Read crypto-challenge header&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| Enter crypto mode with seed &amp;quot;0838A25A344F818ABB6456694D4E8D&amp;quot;&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| Encrypted command&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
===== Encryption =====&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
= 1,2 Switch =&lt;br /&gt;
&lt;br /&gt;
Credit images: smiba ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Description ===&lt;br /&gt;
* Package: TSOP-48&lt;br /&gt;
* Manufacturer: Unknown&lt;br /&gt;
&lt;br /&gt;
=== Frontside ===&lt;br /&gt;
[[File:CartridgeFront.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Frontside (bare) ===&lt;br /&gt;
[[File:CartridgeFrontBare.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Backside ===&lt;br /&gt;
[[File:CartridgeBack.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
= Zelda: Breath of the wild =&lt;br /&gt;
Credit images: Retr0id ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Description ===&lt;br /&gt;
* Package: Custom&lt;br /&gt;
* Manufacturer: Macronix (MX)&lt;br /&gt;
&lt;br /&gt;
=== Overview === &lt;br /&gt;
[[File:CartridgeZelda.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Frontside ===&lt;br /&gt;
[[File:CartridgeZeldaFront.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Backside ===&lt;br /&gt;
[[File:CartridgeZeldaBack.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
= Schematic =&lt;br /&gt;
Credit images: smiba ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Connector Pinout Schematic ===&lt;br /&gt;
[[File:CatridgePinout.png|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Chip Pinout Schematic ===&lt;br /&gt;
[[File:CartridgePinoutTsop.png|600px]]&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1875</id>
		<title>Cartridge</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=Cartridge&amp;diff=1875"/>
		<updated>2017-08-02T22:12:24Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
===== Pinout =====&lt;br /&gt;
[[File:Gamecard-pinout.png|400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Pin&lt;br /&gt;
! Name&lt;br /&gt;
! Direction&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 0 &lt;br /&gt;
| IRQ?&lt;br /&gt;
| Output&lt;br /&gt;
| Always wired to GND inside game cartridge; Possibly used for interrupt signaling&lt;br /&gt;
|- &lt;br /&gt;
| 1 &lt;br /&gt;
| RCLK&lt;br /&gt;
| Output&lt;br /&gt;
| Return clock; Game cartridge sends back CLK signal delayed by a few ns&lt;br /&gt;
|- &lt;br /&gt;
| 2 &lt;br /&gt;
| CLK &lt;br /&gt;
| Input&lt;br /&gt;
| Clock, 25MHz&lt;br /&gt;
|- &lt;br /&gt;
| 3 &lt;br /&gt;
| CS&lt;br /&gt;
| Input&lt;br /&gt;
| Chip select; Switch pulls this LOW during a transfer&lt;br /&gt;
|- &lt;br /&gt;
| 4&lt;br /&gt;
| DAT0 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 0&lt;br /&gt;
|- &lt;br /&gt;
| 5 &lt;br /&gt;
| DAT1 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 1&lt;br /&gt;
|- &lt;br /&gt;
| 6 &lt;br /&gt;
| VCC 3.3v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 7 &lt;br /&gt;
| DAT2 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 2&lt;br /&gt;
|- &lt;br /&gt;
| 8 &lt;br /&gt;
| DAT3 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 3&lt;br /&gt;
|- &lt;br /&gt;
| 9 &lt;br /&gt;
| VCC 1.8v &lt;br /&gt;
| Input&lt;br /&gt;
|&lt;br /&gt;
|- &lt;br /&gt;
| 10 &lt;br /&gt;
| DAT4 &lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 4&lt;br /&gt;
|- &lt;br /&gt;
| 11 &lt;br /&gt;
| DAT5&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 5&lt;br /&gt;
|- &lt;br /&gt;
| 12 &lt;br /&gt;
| DAT6&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 6&lt;br /&gt;
|- &lt;br /&gt;
| 13 &lt;br /&gt;
| DAT7&lt;br /&gt;
| Inout&lt;br /&gt;
| Data bus pin 7&lt;br /&gt;
|- &lt;br /&gt;
| 14 &lt;br /&gt;
| GND&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| 15 &lt;br /&gt;
| RST&lt;br /&gt;
| Input&lt;br /&gt;
| Reset, active LOW.&lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
All IO use 1.8V for logic HIGH and 0V for logic LOW.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
===== Protocol =====&lt;br /&gt;
Switch game cartridges use a simple (but Nintendo proprietery) SPI-like bus with 8-bit width (DAT7..0). It is very similar to the bus interface of 3DS game cartridges, except with very different commands.&lt;br /&gt;
&lt;br /&gt;
The Switch host starts a transfer by first pulling CS low, followed by clocking a byte each clock cycle. The bus data will always be ready before the rising edge of the CLK signal, so that it can be captured on the rising edge.&lt;br /&gt;
After command bytes are written to the bus, the direction of the bus implicitly changes and the game cartridge responds. The Switch host keeps clocking while the game cartridge responds.&lt;br /&gt;
After the transfer is ended, the CS line is pulled high again.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Commands are 16 bytes long, and followed immediately by a 4-byte CRC-32 over the command bytes. After this, the bus direction changes, and the bus will be &#039;floating&#039; for a few cycles (&#039;&#039;TBD figure out if cartridge can respond with NAK over bad CRC during floating bus&#039;&#039;).  &lt;br /&gt;
&lt;br /&gt;
Before the game cartridge responds with the actual response data, it will send busy bytes (LSB will be zero) to the Switch host, until it is ready to send the real response. When the game cartridge is ready, it will send 2 acknowledgement bytes (LSB will be one) to let the Switch host know. After this, the game cartridge will send the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
The actual response bytes are also followed immediately by a 4-byte CRC-32 over the actual response bytes.&lt;br /&gt;
&lt;br /&gt;
===== Commands =====&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Command&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000000000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;A5000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;56000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;28000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;5B000000380000010000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E2000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;E0000000000000000000000000000000&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;200838A25A344F818ABB6456694D4E8D&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7EE41FDF12C01C157CC899910673A0CF&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;263C8230EC15FAE3CE79365BD850F4BD&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;B6FDA6F37FFA29E18831D0B217DFBDBE&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
| &amp;lt;code&amp;gt;7B97F7DF07240AA9870E1C974336FA8A&amp;lt;/code&amp;gt;&lt;br /&gt;
| &lt;br /&gt;
|- &lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The meaning of some these commands are currently unknown.&lt;br /&gt;
&lt;br /&gt;
===== Encryption =====&lt;br /&gt;
After a few initial plaintext commands, the Switch instructs the game cartridge to enter into encrypted mode. From that point on, commands and responses are sent encrypted over the bus. The encryption algorithm used is currently unknown.&lt;br /&gt;
&lt;br /&gt;
= 1,2 Switch =&lt;br /&gt;
&lt;br /&gt;
Credit images: smiba ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Description ===&lt;br /&gt;
* Package: TSOP-48&lt;br /&gt;
* Manufacturer: Unknown&lt;br /&gt;
&lt;br /&gt;
=== Frontside ===&lt;br /&gt;
[[File:CartridgeFront.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Frontside (bare) ===&lt;br /&gt;
[[File:CartridgeFrontBare.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Backside ===&lt;br /&gt;
[[File:CartridgeBack.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
= Zelda: Breath of the wild =&lt;br /&gt;
Credit images: Retr0id ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Description ===&lt;br /&gt;
* Package: Custom&lt;br /&gt;
* Manufacturer: Macronix (MX)&lt;br /&gt;
&lt;br /&gt;
=== Overview === &lt;br /&gt;
[[File:CartridgeZelda.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Frontside ===&lt;br /&gt;
[[File:CartridgeZeldaFront.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Backside ===&lt;br /&gt;
[[File:CartridgeZeldaBack.jpeg|600px]]&lt;br /&gt;
&lt;br /&gt;
= Schematic =&lt;br /&gt;
Credit images: smiba ([http://gbatemp.net/threads/switch-cartridge-reverse-engineering.464580/ link])&lt;br /&gt;
&lt;br /&gt;
=== Connector Pinout Schematic ===&lt;br /&gt;
[[File:CatridgePinout.png|600px]]&lt;br /&gt;
&lt;br /&gt;
=== Chip Pinout Schematic ===&lt;br /&gt;
[[File:CartridgePinoutTsop.png|600px]]&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=User:$andeor&amp;diff=1872</id>
		<title>User:$andeor</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=User:$andeor&amp;diff=1872"/>
		<updated>2017-08-02T21:26:15Z</updated>

		<summary type="html">&lt;p&gt;$andeor: Created page with &amp;quot;Hello, I am andeor, nice to meet you!&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Hello, I am andeor, nice to meet you!&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
	<entry>
		<id>https://switchbrew.org/w/index.php?title=File:Gamecard-pinout.png&amp;diff=1871</id>
		<title>File:Gamecard-pinout.png</title>
		<link rel="alternate" type="text/html" href="https://switchbrew.org/w/index.php?title=File:Gamecard-pinout.png&amp;diff=1871"/>
		<updated>2017-08-02T21:25:37Z</updated>

		<summary type="html">&lt;p&gt;$andeor: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>$andeor</name></author>
	</entry>
</feed>