Changes

83 bytes removed ,  17:53, 17 January 2020
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| (In) X1 || uint64_t || Size
 
| (In) X1 || uint64_t || Size
 
|-
 
|-
| (In) W2 || uint32_t || State0
+
| (In) W2 || uint32_t || Mask
 
|-
 
|-
| (In) W3 || uint32_t || State1
+
| (In) W3 || uint32_t || Value
 
|-
 
|-
 
| (Out) W0 || [[#Result]] || Result
 
| (Out) W0 || [[#Result]] || Result
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</div>
 
</div>
   −
Changes attribute of page-aligned memory region.  
+
Changes attribute of page-aligned memory region. The only allowed combination of Value and Mask is 0x8, which means only bit3 in [[#MemoryAttribute]] can be set or cleared.
    
This is used to turn on/off caching for a given memory area. Useful when talking to devices such as the GPU.
 
This is used to turn on/off caching for a given memory area. Useful when talking to devices such as the GPU.
    
What happens "under the hood" is the "Memory Attribute Indirection Register" index is changed from 2 to 3 in the MMU descriptor.
 
What happens "under the hood" is the "Memory Attribute Indirection Register" index is changed from 2 to 3 in the MMU descriptor.
  −
{| class=wikitable
  −
! State0 || State1 || Action
  −
|-
  −
| 0 || 0 || Clear bit3 in [[#MemoryAttribute]].
  −
|-
  −
| 8 || 0 || Clear bit3 in [[#MemoryAttribute]].
  −
|-
  −
| 8 || 8 || Set bit3 in [[#MemoryAttribute]].
  −
|}
      
== MapMemory ==
 
== MapMemory ==